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[/] [openrisc/] [trunk/] [orpsocv2/] [sw/] [drivers/] [or1200/] - Rev 470

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Rev Log message Author Age Path
470 ORPSoC OR1200 crt0 updates. julius 4894d 02h /openrisc/trunk/orpsocv2/sw/drivers/or1200/
439 ORPSoC update

Ethernet MAC synthesis issues with Actel Synplify D-2009.12A
Ethernet MAC FIFO synthesis issues with Xilinx XST

Multiply/divide tests for to run on target.

Added third interface to ram_wb module, changed reference design RAM to ram_wb
wrapper. Updated verilog and system C monitor modules accordingly.

Added ability to use ram_wb as internal memory on ML501 design.

Fixed ethernet MAC tests for ML501.		 julius 4928d 20h /openrisc/trunk/orpsocv2/sw/drivers/or1200/
425 ORPSoC update:

GDB servers in VPI and System C model updated to deal with
packets gdb-7.2 sends.

Documentation updated.

Reference design tests can now be run in or1ksim (added rule
to sim/bin/Makefile). or1200-except doesn't appear to work
as illegal instruction error isn't causing jump to vector.

Updated Or1200 tests to report test success value and then
exit with value 0.		 julius 4948d 12h /openrisc/trunk/orpsocv2/sw/drivers/or1200/
411 Improved ethmac testbench and software.

Renamed some OR1200 library functions to be more generic.

Fixed bug with versatile_mem_ctrl for Actel board.

Added ability to simulate gatelevel modules alongside RTL modules
in board build.		 julius 4960d 23h /openrisc/trunk/orpsocv2/sw/drivers/or1200/
408 ORPSoC update - adding support for ORSoC development board, many changes, documentation update, too. julius 4962d 11h /openrisc/trunk/orpsocv2/sw/drivers/or1200/
396 ORPSoCv2 final software fixes...for now. See updated README julius 4968d 21h /openrisc/trunk/orpsocv2/sw/drivers/or1200/
393 ORPSoCv2 software rearrangement in progress. Basic tests should now run again. julius 4968d 21h /openrisc/trunk/orpsocv2/sw/drivers/or1200/

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