| Rev |
Log message |
Author |
Age |
Path |
| 505 |
OR1200 overflow detection fixup
SPIflash program update
or1200 driver library timer improvement |
julius |
4966d 06h |
/openrisc/trunk/orpsocv2/sw/drivers/or1200/ |
| 489 |
ORPSoC sw cleanup. Remove warnings. |
julius |
5014d 08h |
/openrisc/trunk/orpsocv2/sw/drivers/or1200/ |
| 488 |
ORPSoC OR1200 driver - tick timer exception handler reverted to generic - cpu tick function hook used as default in handler table. OR1200 timer demo sw for board added. |
julius |
5014d 09h |
/openrisc/trunk/orpsocv2/sw/drivers/or1200/ |
| 486 |
ORPSoC updates, mainly software, i2c driver |
julius |
5017d 06h |
/openrisc/trunk/orpsocv2/sw/drivers/or1200/ |
| 485 |
ORPSoC updates - or1200 monitor now has separate defines file, ethmac updates to fifos and wishbone IF, board.h changes for UART (may propegate to other drivers with multiple cores, we'll see), crt0.S for or1200 now zeros all registers on reset, adding own ethernet tests for ML501 |
julius |
5021d 11h |
/openrisc/trunk/orpsocv2/sw/drivers/or1200/ |
| 475 |
ORPSoC main simulation makefile tidy up, addition of BSS test to cbasic test, addition or o1ksim config files for each board build, modification of BSS symbols in linker script and crt0. |
julius |
5042d 10h |
/openrisc/trunk/orpsocv2/sw/drivers/or1200/ |
| 470 |
ORPSoC OR1200 crt0 updates. |
julius |
5046d 10h |
/openrisc/trunk/orpsocv2/sw/drivers/or1200/ |
| 439 |
ORPSoC update
Ethernet MAC synthesis issues with Actel Synplify D-2009.12A
Ethernet MAC FIFO synthesis issues with Xilinx XST
Multiply/divide tests for to run on target.
Added third interface to ram_wb module, changed reference design RAM to ram_wb
wrapper. Updated verilog and system C monitor modules accordingly.
Added ability to use ram_wb as internal memory on ML501 design.
Fixed ethernet MAC tests for ML501. |
julius |
5081d 05h |
/openrisc/trunk/orpsocv2/sw/drivers/or1200/ |
| 425 |
ORPSoC update:
GDB servers in VPI and System C model updated to deal with
packets gdb-7.2 sends.
Documentation updated.
Reference design tests can now be run in or1ksim (added rule
to sim/bin/Makefile). or1200-except doesn't appear to work
as illegal instruction error isn't causing jump to vector.
Updated Or1200 tests to report test success value and then
exit with value 0. |
julius |
5100d 21h |
/openrisc/trunk/orpsocv2/sw/drivers/or1200/ |
| 411 |
Improved ethmac testbench and software.
Renamed some OR1200 library functions to be more generic.
Fixed bug with versatile_mem_ctrl for Actel board.
Added ability to simulate gatelevel modules alongside RTL modules
in board build. |
julius |
5113d 07h |
/openrisc/trunk/orpsocv2/sw/drivers/or1200/ |
| 408 |
ORPSoC update - adding support for ORSoC development board, many changes, documentation update, too. |
julius |
5114d 20h |
/openrisc/trunk/orpsocv2/sw/drivers/or1200/ |
| 396 |
ORPSoCv2 final software fixes...for now. See updated README |
julius |
5121d 05h |
/openrisc/trunk/orpsocv2/sw/drivers/or1200/ |
| 393 |
ORPSoCv2 software rearrangement in progress. Basic tests should now run again. |
julius |
5121d 06h |
/openrisc/trunk/orpsocv2/sw/drivers/or1200/ |
