URL https://opencores.org/ocsvn/openrisc_me/openrisc_me/trunk

Subversion Repositories openrisc_me

[/] [openrisc/] [trunk/] [orpsocv2/] [sw/] [drivers/] [or1200/] [include/] - Rev 470

Rev	Log message	Author	Age	Path
411	Improved ethmac testbench and software. Renamed some OR1200 library functions to be more generic. Fixed bug with versatile_mem_ctrl for Actel board. Added ability to simulate gatelevel modules alongside RTL modules in board build.	julius	5003d 07h	/openrisc/trunk/orpsocv2/sw/drivers/or1200/include/
408	ORPSoC update - adding support for ORSoC development board, many changes, documentation update, too.	julius	5004d 19h	/openrisc/trunk/orpsocv2/sw/drivers/or1200/include/
393	ORPSoCv2 software rearrangement in progress. Basic tests should now run again.	julius	5011d 06h	/openrisc/trunk/orpsocv2/sw/drivers/or1200/include/