URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [orpsocv2/] [sw/] [tests/] [sdram/] [sim/] - Rev 803

Rev	Log message	Author	Age	Path
426	ORPSoC update Reverted back to previous OR1200 instruction cache. (...which...) Fixed or1200-except test failure on generic model. ML501 build not passing or1200-except test. Tried disabling burst on the bus (memory server doesn't support it yet) to no avail. To be continued...	julius	5112d 02h	/openrisc/trunk/orpsocv2/sw/tests/sdram/sim/
403	ORPSoC big upgrade - intermediate check in. Lots still missing. To come very shortly.	julius	5127d 08h	/openrisc/trunk/orpsocv2/sw/tests/sdram/sim/
393	ORPSoCv2 software rearrangement in progress. Basic tests should now run again.	julius	5132d 13h	/openrisc/trunk/orpsocv2/sw/tests/sdram/sim/