URL https://opencores.org/ocsvn/openrisc/openrisc/trunk

Subversion Repositories openrisc

[/] [openrisc/] [trunk/] [orpsocv2/] [sw/] [tests/] [spi/] - Rev 655

Rev	Log message	Author	Age	Path
415	ORPSoC - ML501 update, working again. Documentation update including information on ML501 build OR1200 updates to do with instruction cache tag signal when invalidate instruction used. Added ability to define address to pass to SPI flash when booting. Added SPI sw test for board which allows inspection of data in a flash.	julius	4966d 01h	/openrisc/trunk/orpsocv2/sw/tests/spi/
403	ORPSoC big upgrade - intermediate check in. Lots still missing. To come very shortly.	julius	4972d 21h	/openrisc/trunk/orpsocv2/sw/tests/spi/
393	ORPSoCv2 software rearrangement in progress. Basic tests should now run again.	julius	4978d 02h	/openrisc/trunk/orpsocv2/sw/tests/spi/