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[/] [openrisc/] [trunk/] [rtos/] [freertos-6.1.1/] [Demo/] [OpenRISC_SIM_GCC/] - Rev 758

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Rev Log message Author Age Path
675 FreeRTOSV6.1.1
Source cleanup
Add redzone beyond the stack pointer		 filepang 4649d 16h /openrisc/trunk/rtos/freertos-6.1.1/Demo/OpenRISC_SIM_GCC/
668 FreeRTOSV6.1.1
add missing 'make clean' in make script		 filepang 4693d 15h /openrisc/trunk/rtos/freertos-6.1.1/Demo/OpenRISC_SIM_GCC/
666 FreeRTOSV6.1.1
minimal set of standard demo task is working		 filepang 4696d 00h /openrisc/trunk/rtos/freertos-6.1.1/Demo/OpenRISC_SIM_GCC/
649 porting some of standard demo tasks

fix serial port(UART) interrupt handler		 filepang 4770d 23h /openrisc/trunk/rtos/freertos-6.1.1/Demo/OpenRISC_SIM_GCC/
637 porint parallel port(gpio) management task filepang 4798d 00h /openrisc/trunk/rtos/freertos-6.1.1/Demo/OpenRISC_SIM_GCC/
636 porting serial port management task, interrupt hander filepang 4798d 00h /openrisc/trunk/rtos/freertos-6.1.1/Demo/OpenRISC_SIM_GCC/
623 cleanup source code
Demo/OpenRISC_SIM_GCC/arch/support.h
Demo/OpenRISC_SIM_GCC/arch/interrupts.h
Demo/OpenRISC_SIM_GCC/arch/link.ld

add gpio driver

add gpio base address definition		 filepang 4810d 23h /openrisc/trunk/rtos/freertos-6.1.1/Demo/OpenRISC_SIM_GCC/
622 update uart driver for support multiple uart cores
from http://opencores.org/ocsvn/openrisc/openrisc/trunk/orpsocv2/sw/drivers/uart		 filepang 4811d 01h /openrisc/trunk/rtos/freertos-6.1.1/Demo/OpenRISC_SIM_GCC/
621 update sim.cfg for newer version of Or1ksim.
remove unused files.
cleanup source code.

insert non-local jump(setjmp) in xPortStartScheduler. now xPortStartScheduler() will
be returned by xPortEndScheduler().		 filepang 4812d 17h /openrisc/trunk/rtos/freertos-6.1.1/Demo/OpenRISC_SIM_GCC/
620 remove unused file
cleanup makefile
update uart_init(), disable interrupt before initialize.		 jeremybennett 4813d 06h /openrisc/trunk/rtos/freertos-6.1.1/Demo/OpenRISC_SIM_GCC/
584 Initial port of FreeRTOS by filepang (Kim Sung Su). jeremybennett 4827d 03h /openrisc/trunk/rtos/freertos-6.1.1/Demo/OpenRISC_SIM_GCC/

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