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[/] [or1k/] [branches/] [branch_qmem/] - Rev 993

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Rev Log message Author Age Path
993 Fixed IMMU bug. lampret 8001d 06h /or1k/branches/branch_qmem/
992 A bug when cache enabled and bus error comes fixed. simons 8001d 15h /or1k/branches/branch_qmem/
991 Different memory controller. simons 8001d 15h /or1k/branches/branch_qmem/
990 Test is now complete. simons 8001d 16h /or1k/branches/branch_qmem/
989 c++ is making problems so, for now, it is excluded. simons 8002d 23h /or1k/branches/branch_qmem/
988 ORP architecture supported. simons 8003d 15h /or1k/branches/branch_qmem/
987 ORP architecture supported. simons 8003d 22h /or1k/branches/branch_qmem/
986 outputs out of function are not registered anymore markom 8003d 23h /or1k/branches/branch_qmem/
985 DTLB translation doesn't work on or1ksim when IC/DC enabled. lampret 8004d 10h /or1k/branches/branch_qmem/
984 Disable SB until it is tested lampret 8004d 11h /or1k/branches/branch_qmem/
983 First checkin lampret 8004d 13h /or1k/branches/branch_qmem/
982 Moved to sim/bin lampret 8004d 13h /or1k/branches/branch_qmem/
981 First checkin. lampret 8004d 13h /or1k/branches/branch_qmem/
980 Removed sim.tcl that shouldn't be here. lampret 8004d 13h /or1k/branches/branch_qmem/
979 Removed old test case binaries. lampret 8004d 13h /or1k/branches/branch_qmem/
978 Added variable delay for SRAM. lampret 8004d 13h /or1k/branches/branch_qmem/
977 Added store buffer. lampret 8004d 13h /or1k/branches/branch_qmem/
976 Added store buffer lampret 8004d 13h /or1k/branches/branch_qmem/
975 First checkin lampret 8004d 13h /or1k/branches/branch_qmem/
974 Enabled what works on or1ksim and disabled other tests. lampret 8004d 15h /or1k/branches/branch_qmem/

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