Rev |
Log message |
Author |
Age |
Path |
1765 |
|
root |
5601d 18h |
/or1k/branches/stable_0_1_x/insight/ |
1356 |
This commit was manufactured by cvs2svn to create branch 'stable_0_1_x'. |
|
7090d 07h |
/or1k/branches/stable_0_1_x/insight/ |
1350 |
Mark a simulated cpu address as such, by introducing the new oraddr_t type |
nogj |
7091d 23h |
/or1k/branches/stable_0_1_x/insight/ |
1346 |
Remove the global op structure |
nogj |
7105d 03h |
/or1k/branches/stable_0_1_x/insight/ |
1344 |
* Avoid doing a store in *every* instruction executed by storeing the instruction function unit in or32_opcodes |
nogj |
7105d 03h |
/or1k/branches/stable_0_1_x/insight/ |
1342 |
* Fix generate.c to produce a execgen.c with less warnings.
* Fix the --enable-simple configure option. |
nogj |
7105d 03h |
/or1k/branches/stable_0_1_x/insight/ |
1341 |
Mark wich operand is the destination operand in the architechture definition |
nogj |
7105d 04h |
/or1k/branches/stable_0_1_x/insight/ |
1338 |
l.ff1 instruction added |
andreje |
7121d 01h |
/or1k/branches/stable_0_1_x/insight/ |
1333 |
gcc 3.4 compile fix |
phoenix |
7136d 02h |
/or1k/branches/stable_0_1_x/insight/ |
1309 |
removed includes |
phoenix |
7293d 21h |
/or1k/branches/stable_0_1_x/insight/ |
1308 |
Gyorgy Jeney: extensive cleanup |
phoenix |
7296d 18h |
/or1k/branches/stable_0_1_x/insight/ |
1295 |
Updated instruction set descriptions. Changed FP instructions encoding. |
lampret |
7318d 18h |
/or1k/branches/stable_0_1_x/insight/ |
1286 |
Changed desciption of the l.cust5 insns |
lampret |
7367d 21h |
/or1k/branches/stable_0_1_x/insight/ |
1285 |
Changed desciption of the l.cust5 insns |
lampret |
7367d 21h |
/or1k/branches/stable_0_1_x/insight/ |
1256 |
page size is 8192 on or32 |
phoenix |
7452d 21h |
/or1k/branches/stable_0_1_x/insight/ |
1169 |
Added support for l.addc instruction. |
csanchez |
7680d 21h |
/or1k/branches/stable_0_1_x/insight/ |
1152 |
*** empty log message *** |
phoenix |
7761d 00h |
/or1k/branches/stable_0_1_x/insight/ |
1149 |
*** empty log message *** |
phoenix |
7761d 13h |
/or1k/branches/stable_0_1_x/insight/ |
1144 |
Speed up gdb when running with serial targets:
When generating backtraces, the prologue of each function is scanned
at least three times by architecture-independent code, e.g. to
determine offsets of saved registers, identify frameless functions,
etc. This new code adds straightforward caching of the information
gleaned by or1k_scan_prologue() on a per-frame basis rather than
storing it in global static variables. (This benefits both JTAG and
serial gdb targets, though the JTAG target runs fast enough that it is
not particularly needed.)
When the register set is dumped by the serial target, e.g. at any
breakpoint or interrupt, the 32 vector/FP registers were included in
the dump (each 8 bytes long), though they aren't implemented. The new
code tells gdb that unimplemented registers have zero length in the
dump. |
sfurman |
7763d 20h |
/or1k/branches/stable_0_1_x/insight/ |
1142 |
Speed up gdb when running with serial targets:
When generating backtraces, the prologue of each function is scanned
at least three times by architecture-independent code, e.g. to
determine offsets of saved registers, identify frameless functions,
etc. This new code adds straightforward caching of the information
gleaned by or1k_scan_prologue() on a per-frame basis rather than
storing it in global static variables. (This benefits both JTAG and
serial gdb targets, though the JTAG target runs fast enough that it is
not particularly needed.)
When the register set is dumped by the serial target, e.g. at any
breakpoint or interrupt, the 32 vector/FP registers were included in
the dump (each 8 bytes long), though they aren't implemented. The new
code tells gdb that unimplemented registers have zero length in the
dump. |
sfurman |
7764d 11h |
/or1k/branches/stable_0_1_x/insight/ |