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[/] [or1k/] [branches/] [stable_0_1_x/] [or1ksim/] [pm/] - Rev 1765

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Rev Log message Author Age Path
1765 root 5572d 00h /or1k/branches/stable_0_1_x/or1ksim/pm/
1378 aclocal && autoconf && automake phoenix 7045d 10h /or1k/branches/stable_0_1_x/or1ksim/pm/
1356 This commit was manufactured by cvs2svn to create branch 'stable_0_1_x'. 7060d 12h /or1k/branches/stable_0_1_x/or1ksim/pm/
1350 Mark a simulated cpu address as such, by introducing the new oraddr_t type nogj 7062d 05h /or1k/branches/stable_0_1_x/or1ksim/pm/
1249 Downgrading back to automake-1.4 lampret 7431d 23h /or1k/branches/stable_0_1_x/or1ksim/pm/
1117 Ignore generated files for CVS purposes sfurman 7774d 23h /or1k/branches/stable_0_1_x/or1ksim/pm/
997 PRINTF should be used instead of printf; command redirection repaired markom 7963d 14h /or1k/branches/stable_0_1_x/or1ksim/pm/
970 Testbench is now running on ORP architecture platform. simons 7971d 01h /or1k/branches/stable_0_1_x/or1ksim/pm/
876 Beta release of ATA simulation rherveille 8015d 00h /or1k/branches/stable_0_1_x/or1ksim/pm/
805 kbd, fb, vga devices now uses scheduler markom 8098d 15h /or1k/branches/stable_0_1_x/or1ksim/pm/
517 some performance optimizations markom 8194d 09h /or1k/branches/stable_0_1_x/or1ksim/pm/
500 Added .cvsignore files for annoying generated files erez 8196d 12h /or1k/branches/stable_0_1_x/or1ksim/pm/
221 major changes to testbench; debug unit is moved to /debug; memory organization can be customized; UART from simons; overall cleanup markom 8266d 12h /or1k/branches/stable_0_1_x/or1ksim/pm/
167 - SPR values corrected
- testbenches now work
- lot of optimizations, use --disable-debugmod for optimal performance
- some tick timer bugs fixed		 markom 8343d 08h /or1k/branches/stable_0_1_x/or1ksim/pm/
102 Major update to include PM, PIC, Cache Mngmnt and non-interactive mode. lampret 8425d 17h /or1k/branches/stable_0_1_x/or1ksim/pm/

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