OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [branches/] [stable_0_2_x/] - Rev 1078

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
1078 Previous check-in was done by mistake. mohor 7932d 02h /or1k/branches/stable_0_2_x/
1077 Signal scanb_sen renamed to scanb_en. mohor 7932d 02h /or1k/branches/stable_0_2_x/
1076 channels integration rprescott 7932d 20h /or1k/branches/stable_0_2_x/
1075 channels integration rprescott 7932d 20h /or1k/branches/stable_0_2_x/
1074 channels integration rprescott 7932d 20h /or1k/branches/stable_0_2_x/
1073 channels support rprescott 7934d 23h /or1k/branches/stable_0_2_x/
1072 Added me ;-) rprescott 7934d 23h /or1k/branches/stable_0_2_x/
1070 Channels (fd,file,xterm) first import rprescott 7935d 00h /or1k/branches/stable_0_2_x/
1069 Signal scanb_eni renamed to scanb_en mohor 7935d 19h /or1k/branches/stable_0_2_x/
1068 Minimum packet length cheching changed to present the real hw. simons 7936d 16h /or1k/branches/stable_0_2_x/
1067 Changed main structure. rherveille 7939d 08h /or1k/branches/stable_0_2_x/
1066 readme updated markom 7939d 08h /or1k/branches/stable_0_2_x/
1065 Removed trailing ' \' used to continue code on the next line.
This caused problems with some compilers.		 rherveille 7942d 04h /or1k/branches/stable_0_2_x/
1063 Added BIST scan. Special VS RAMs need to be used to implement BIST. lampret 7942d 21h /or1k/branches/stable_0_2_x/
1062 few cuc bugs fixed markom 7949d 07h /or1k/branches/stable_0_2_x/
1061 ELF sym loading improved markom 7950d 03h /or1k/branches/stable_0_2_x/
1060 cuc sw loading bug fixed markom 7963d 03h /or1k/branches/stable_0_2_x/
1059 several cuc bugs fixed; different verilog cuc file naming markom 7963d 03h /or1k/branches/stable_0_2_x/
1058 Different memory controller. simons 7973d 21h /or1k/branches/stable_0_2_x/
1057 Different memory controller. simons 7973d 21h /or1k/branches/stable_0_2_x/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.