OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [branches/] [stable_0_2_x/] - Rev 1625

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
1625 First Import of uClinux for RC20x board jcastillo 6790d 13h /or1k/branches/stable_0_2_x/
1624 First Import of uClinux for RC20x board jcastillo 6790d 13h /or1k/branches/stable_0_2_x/
1623 First Import of uClinux for RC20x board jcastillo 6790d 13h /or1k/branches/stable_0_2_x/
1622 First Import of uClinux for RC20x board jcastillo 6790d 14h /or1k/branches/stable_0_2_x/
1621 First Impot jcastillo 6790d 15h /or1k/branches/stable_0_2_x/
1620 Added SMC91C111 LAN Chip Interruption to work with uClinux jcastillo 6795d 10h /or1k/branches/stable_0_2_x/
1619 Fixed types in function declaration jcastillo 6795d 15h /or1k/branches/stable_0_2_x/
1618 Import of or32 sepcific part of binutils port updated by Balint and Nog phoenix 6795d 22h /or1k/branches/stable_0_2_x/
1617 *** empty log message *** phoenix 6795d 22h /or1k/branches/stable_0_2_x/
1616 Import of or32 sepcific part of binutils port updated by Balint and Nog phoenix 6795d 22h /or1k/branches/stable_0_2_x/
1615 *** empty log message *** phoenix 6795d 22h /or1k/branches/stable_0_2_x/
1614 CI should not be set in dMMU translation tables or one gets different behaviour with dMMU on or off in case data cache is enabled. care should be taken for addresses higher than 0x7fff_ffff where the situation is just reversed. (since or1200 does not cache upper half of address space if there is no dMMU) phoenix 6805d 23h /or1k/branches/stable_0_2_x/
1613 change default phoenix 6811d 08h /or1k/branches/stable_0_2_x/
1612 major optimizations for or32 target phoenix 6811d 09h /or1k/branches/stable_0_2_x/
1610 Update ChangeLog nogj 6814d 10h /or1k/branches/stable_0_2_x/
1609 0.2.0-rc2 release nogj 6814d 10h /or1k/branches/stable_0_2_x/
1608 Avoid scheduleing too many jobs, potentially underflowing the scheduler stack nogj 6815d 04h /or1k/branches/stable_0_2_x/
1607 Don't drop cycles from the scheduler nogj 6815d 05h /or1k/branches/stable_0_2_x/
1606 fix uninitialized reads phoenix 6815d 10h /or1k/branches/stable_0_2_x/
1605 Execute l.ff1 instruction nogj 6822d 05h /or1k/branches/stable_0_2_x/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.