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Rev Log message Author Age Path
1591 Added l.fl1, fixed desc of l.ff1 lampret 6793d 08h /or1k/branches/stable_0_2_x/gen_or1k_isa/
1590 Added l.fl1 lampret 6793d 08h /or1k/branches/stable_0_2_x/gen_or1k_isa/
1557 Fix most warnings issued by gcc4 nogj 6852d 18h /or1k/branches/stable_0_2_x/gen_or1k_isa/
1554 fixed l.maci encoding phoenix 6870d 05h /or1k/branches/stable_0_2_x/gen_or1k_isa/
1475 l.rfe does not have a delay slot. Don't mark it as such. nogj 6983d 08h /or1k/branches/stable_0_2_x/gen_or1k_isa/
1452 Implement a dynamic recompiler to speed up the execution nogj 7010d 11h /or1k/branches/stable_0_2_x/gen_or1k_isa/
1440 Reclasify l.trap and l.sys to be an exception instruction nogj 7010d 11h /or1k/branches/stable_0_2_x/gen_or1k_isa/
1385 Fix description of the l.mac/l.msb/l.maci instructions nogj 7025d 15h /or1k/branches/stable_0_2_x/gen_or1k_isa/
1384 Fix the parameters to the l.ff1/l.maci instructions nogj 7025d 15h /or1k/branches/stable_0_2_x/gen_or1k_isa/
1350 Mark a simulated cpu address as such, by introducing the new oraddr_t type nogj 7060d 10h /or1k/branches/stable_0_2_x/gen_or1k_isa/
1346 Remove the global op structure nogj 7073d 13h /or1k/branches/stable_0_2_x/gen_or1k_isa/
1342 * Fix generate.c to produce a execgen.c with less warnings.
* Fix the --enable-simple configure option.		 nogj 7073d 14h /or1k/branches/stable_0_2_x/gen_or1k_isa/
1341 Mark wich operand is the destination operand in the architechture definition nogj 7073d 14h /or1k/branches/stable_0_2_x/gen_or1k_isa/
1338 l.ff1 instruction added andreje 7089d 12h /or1k/branches/stable_0_2_x/gen_or1k_isa/
1309 removed includes phoenix 7262d 07h /or1k/branches/stable_0_2_x/gen_or1k_isa/
1308 Gyorgy Jeney: extensive cleanup phoenix 7265d 04h /or1k/branches/stable_0_2_x/gen_or1k_isa/
1295 Updated instruction set descriptions. Changed FP instructions encoding. lampret 7287d 04h /or1k/branches/stable_0_2_x/gen_or1k_isa/
1286 Changed desciption of the l.cust5 insns lampret 7336d 07h /or1k/branches/stable_0_2_x/gen_or1k_isa/
1285 Changed desciption of the l.cust5 insns lampret 7336d 07h /or1k/branches/stable_0_2_x/gen_or1k_isa/
1169 Added support for l.addc instruction. csanchez 7649d 08h /or1k/branches/stable_0_2_x/gen_or1k_isa/

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