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[/] [or1k/] [branches/] [stable_0_2_x/] [or1ksim/] - Rev 1765

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Rev Log message Author Age Path
1765 root 5567d 14h /or1k/branches/stable_0_2_x/or1ksim/
1646 This commit was manufactured by cvs2svn to create branch 'stable_0_2_x'. 6714d 17h /or1k/branches/stable_0_2_x/or1ksim/
1645 Or1ksim release 0.2.0 nogj 6714d 17h /or1k/branches/stable_0_2_x/or1ksim/
1644 Update ChangeLog nogj 6714d 17h /or1k/branches/stable_0_2_x/or1ksim/
1643 Fix segmentation fault if setting a breakpoint on a non-existing label nogj 6714d 17h /or1k/branches/stable_0_2_x/or1ksim/
1642 Release 0.2.0-rc3 nogj 6725d 20h /or1k/branches/stable_0_2_x/or1ksim/
1641 Update ChangeLog nogj 6725d 20h /or1k/branches/stable_0_2_x/or1ksim/
1640 Upgrade cvs2cl.pl to version 2.59 nogj 6725d 20h /or1k/branches/stable_0_2_x/or1ksim/
1637 *** empty log message *** rezso 6729d 03h /or1k/branches/stable_0_2_x/or1ksim/
1619 Fixed types in function declaration jcastillo 6749d 05h /or1k/branches/stable_0_2_x/or1ksim/
1614 CI should not be set in dMMU translation tables or one gets different behaviour with dMMU on or off in case data cache is enabled. care should be taken for addresses higher than 0x7fff_ffff where the situation is just reversed. (since or1200 does not cache upper half of address space if there is no dMMU) phoenix 6759d 12h /or1k/branches/stable_0_2_x/or1ksim/
1610 Update ChangeLog nogj 6767d 23h /or1k/branches/stable_0_2_x/or1ksim/
1609 0.2.0-rc2 release nogj 6768d 00h /or1k/branches/stable_0_2_x/or1ksim/
1608 Avoid scheduleing too many jobs, potentially underflowing the scheduler stack nogj 6768d 18h /or1k/branches/stable_0_2_x/or1ksim/
1607 Don't drop cycles from the scheduler nogj 6768d 18h /or1k/branches/stable_0_2_x/or1ksim/
1606 fix uninitialized reads phoenix 6768d 23h /or1k/branches/stable_0_2_x/or1ksim/
1605 Execute l.ff1 instruction nogj 6775d 19h /or1k/branches/stable_0_2_x/or1ksim/
1604 Fix dumphex/dumpverilog to not do unaligned memory access nogj 6775d 19h /or1k/branches/stable_0_2_x/or1ksim/
1598 Handle ethernet addresses as an address and not as an int nogj 6787d 20h /or1k/branches/stable_0_2_x/or1ksim/
1597 Fix parsing the destination register nogj 6787d 20h /or1k/branches/stable_0_2_x/or1ksim/

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