OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [branches/] [stable_0_2_x/] [or1ksim/] [debug/] - Rev 1765

Rev

Filtering Options

Clear current filter

Rev Log message Author Age Path
1765 root 5732d 02h /or1k/branches/stable_0_2_x/or1ksim/debug/
1646 This commit was manufactured by cvs2svn to create branch 'stable_0_2_x'. 6879d 05h /or1k/branches/stable_0_2_x/or1ksim/debug/
1576 configure updates phoenix 6991d 01h /or1k/branches/stable_0_2_x/or1ksim/debug/
1557 Fix most warnings issued by gcc4 nogj 7014d 16h /or1k/branches/stable_0_2_x/or1ksim/debug/
1550 * prototype() -> prototype(void) where appropriate.
* Use `static' where it can be used.
nogj 7076d 04h /or1k/branches/stable_0_2_x/or1ksim/debug/
1546 Only tell the user that we don't simulate a stalled cpu when it would actually
get stalled
nogj 7076d 05h /or1k/branches/stable_0_2_x/or1ksim/debug/
1537 Remove old spr logging code. Use `-d +spr' to get spr access logged to stderr nogj 7076d 18h /or1k/branches/stable_0_2_x/or1ksim/debug/
1516 Make non-writeable memory writeable by the debug core nogj 7081d 13h /or1k/branches/stable_0_2_x/or1ksim/debug/
1515 Use the new debug channel code instead of a compile time macro nogj 7081d 13h /or1k/branches/stable_0_2_x/or1ksim/debug/
1508 Remove m{f,t}spr calls where we can access the spr directly nogj 7081d 13h /or1k/branches/stable_0_2_x/or1ksim/debug/
1506 * Remove very slow {set,test}sprbit{,s} functions.
* Remove uses of getsprbits in time critical functions.
nogj 7081d 13h /or1k/branches/stable_0_2_x/or1ksim/debug/
1487 Remove useless *breakpoint argument from the {set,eval}_direct* functions nogj 7119d 16h /or1k/branches/stable_0_2_x/or1ksim/debug/
1471 Rewrite the interactive mode handling to also work in the recompiler nogj 7172d 08h /or1k/branches/stable_0_2_x/or1ksim/debug/
1457 Fix typo in the debug unit configureation nogj 7172d 08h /or1k/branches/stable_0_2_x/or1ksim/debug/
1432 Collect most of the cpu state variables in a structure (cpu_state) nogj 7172d 08h /or1k/branches/stable_0_2_x/or1ksim/debug/
1376 aclocal && autoconf && automake phoenix 7206d 12h /or1k/branches/stable_0_2_x/or1ksim/debug/
1359 Pass private data in readfunc/writefunc callbacks nogj 7213d 04h /or1k/branches/stable_0_2_x/or1ksim/debug/
1358 Modularise config file parseing. Paving the way for further modularisation. nogj 7213d 04h /or1k/branches/stable_0_2_x/or1ksim/debug/
1351 Reindent create_watchpoints useing a more compact indentation style nogj 7222d 07h /or1k/branches/stable_0_2_x/or1ksim/debug/
1350 Mark a simulated cpu address as such, by introducing the new oraddr_t type nogj 7222d 07h /or1k/branches/stable_0_2_x/or1ksim/debug/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.