OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [branches/] [stable_0_2_x/] [or1ksim/] [mmu/] - Rev 1765

Rev

Filtering Options

Clear current filter

Rev Log message Author Age Path
1765 root 5732d 02h /or1k/branches/stable_0_2_x/or1ksim/mmu/
1646 This commit was manufactured by cvs2svn to create branch 'stable_0_2_x'. 6879d 05h /or1k/branches/stable_0_2_x/or1ksim/mmu/
1576 configure updates phoenix 6991d 02h /or1k/branches/stable_0_2_x/or1ksim/mmu/
1555 * Moved log2_int() from cuc/cuc.c as it is usefull for other things aswell.
* Changed code to use log2_int() instead of log2(), which is also a builtin
library function (fixes compile on gcc4).
* Moved is_power2() from sim-config.c to misc.c.		 nogj 7014d 16h /or1k/branches/stable_0_2_x/or1ksim/mmu/
1539 Speed up the dmmu nogj 7076d 18h /or1k/branches/stable_0_2_x/or1ksim/mmu/
1538 Speed up the immu nogj 7076d 18h /or1k/branches/stable_0_2_x/or1ksim/mmu/
1532 Add pretty spr dumping code nogj 7080d 04h /or1k/branches/stable_0_2_x/or1ksim/mmu/
1508 Remove m{f,t}spr calls where we can access the spr directly nogj 7081d 13h /or1k/branches/stable_0_2_x/or1ksim/mmu/
1506 * Remove very slow {set,test}sprbit{,s} functions.
* Remove uses of getsprbits in time critical functions.		 nogj 7081d 13h /or1k/branches/stable_0_2_x/or1ksim/mmu/
1446 Cosmetic fixes nogj 7172d 09h /or1k/branches/stable_0_2_x/or1ksim/mmu/
1432 Collect most of the cpu state variables in a structure (cpu_state) nogj 7172d 09h /or1k/branches/stable_0_2_x/or1ksim/mmu/
1418 Rearange some code such that it is not assumed that except_handle returns nogj 7172d 09h /or1k/branches/stable_0_2_x/or1ksim/mmu/
1416 Make the immu use the new debug functions nogj 7172d 09h /or1k/branches/stable_0_2_x/or1ksim/mmu/
1414 Rearange code in the dmmu such that it is not assumed that except_handle returns nogj 7172d 09h /or1k/branches/stable_0_2_x/or1ksim/mmu/
1412 Make the dmmu use the new debug functions nogj 7172d 09h /or1k/branches/stable_0_2_x/or1ksim/mmu/
1382 Nir Mor:
Implemented DCCFGR, ICCFGR, DMMUCFGR and IMMUCFGR spr registers.		 nogj 7187d 13h /or1k/branches/stable_0_2_x/or1ksim/mmu/
1376 aclocal && autoconf && automake phoenix 7206d 13h /or1k/branches/stable_0_2_x/or1ksim/mmu/
1358 Modularise config file parseing. Paving the way for further modularisation. nogj 7213d 04h /or1k/branches/stable_0_2_x/or1ksim/mmu/
1350 Mark a simulated cpu address as such, by introducing the new oraddr_t type nogj 7222d 07h /or1k/branches/stable_0_2_x/or1ksim/mmu/
1344 * Avoid doing a store in *every* instruction executed by storeing the instruction function unit in or32_opcodes nogj 7235d 11h /or1k/branches/stable_0_2_x/or1ksim/mmu/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.