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[/] [or1k/] [branches/] [stable_0_2_x/] [or1ksim/] [peripheral/] - Rev 1606

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Rev Log message Author Age Path
1606 fix uninitialized reads phoenix 6933d 11h /or1k/branches/stable_0_2_x/or1ksim/peripheral/
1598 Handle ethernet addresses as an address and not as an int nogj 6952d 08h /or1k/branches/stable_0_2_x/or1ksim/peripheral/
1586 Charles Qi
Fix memory handling on big endian machines		 nogj 6963d 10h /or1k/branches/stable_0_2_x/or1ksim/peripheral/
1576 configure updates phoenix 6991d 01h /or1k/branches/stable_0_2_x/or1ksim/peripheral/
1567 Hush noisy message that was making test think that the ethernet test failed nogj 7013d 08h /or1k/branches/stable_0_2_x/or1ksim/peripheral/
1564 Fix internal clock handling nogj 7013d 08h /or1k/branches/stable_0_2_x/or1ksim/peripheral/
1563 Fix sending too many interrupts in the uart nogj 7013d 08h /or1k/branches/stable_0_2_x/or1ksim/peripheral/
1557 Fix most warnings issued by gcc4 nogj 7014d 16h /or1k/branches/stable_0_2_x/or1ksim/peripheral/
1556 Create an 8-bit program load function to be able to load an unaligned section nogj 7014d 16h /or1k/branches/stable_0_2_x/or1ksim/peripheral/
1549 Spelling fixes nogj 7076d 05h /or1k/branches/stable_0_2_x/or1ksim/peripheral/
1519 Add a usefull trace to the mc nogj 7081d 13h /or1k/branches/stable_0_2_x/or1ksim/peripheral/
1518 Print a '\n' at the end of the trace nogj 7081d 13h /or1k/branches/stable_0_2_x/or1ksim/peripheral/
1517 Use uint8_t instead of char nogj 7081d 13h /or1k/branches/stable_0_2_x/or1ksim/peripheral/
1505 Make output clearer nogj 7096d 11h /or1k/branches/stable_0_2_x/or1ksim/peripheral/
1504 Use proper types nogj 7096d 11h /or1k/branches/stable_0_2_x/or1ksim/peripheral/
1503 Move loopback handling out of uart_clock16 nogj 7096d 11h /or1k/branches/stable_0_2_x/or1ksim/peripheral/
1502 Move interrupt handling out of uart_clock16 nogj 7096d 11h /or1k/branches/stable_0_2_x/or1ksim/peripheral/
1501 Move RX logic out of uart_clock16 nogj 7096d 11h /or1k/branches/stable_0_2_x/or1ksim/peripheral/
1500 Move vapi command handling out of uart_clock16 nogj 7096d 11h /or1k/branches/stable_0_2_x/or1ksim/peripheral/
1499 Move TX logic out of uart_clock16 nogj 7096d 11h /or1k/branches/stable_0_2_x/or1ksim/peripheral/

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