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[/] [or1k/] [tags/] [MW_0_8_9PRE7/] - Rev 655

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Rev Log message Author Age Path
655 TLB registers addresses changed. simons 8184d 16h /or1k/tags/MW_0_8_9PRE7/
654 This is repaired in new versions of uClinux. simons 8184d 17h /or1k/tags/MW_0_8_9PRE7/
653 Some cleanup. simons 8184d 17h /or1k/tags/MW_0_8_9PRE7/
652 Some cleanup. simons 8184d 18h /or1k/tags/MW_0_8_9PRE7/
651 Some cleanup. simons 8184d 18h /or1k/tags/MW_0_8_9PRE7/
650 Some cleanup. simons 8184d 19h /or1k/tags/MW_0_8_9PRE7/
649 Some cleanup. simons 8184d 19h /or1k/tags/MW_0_8_9PRE7/
648 fb now works in system memory markom 8186d 04h /or1k/tags/MW_0_8_9PRE7/
647 some changes to fb to make it compatible with HW markom 8186d 23h /or1k/tags/MW_0_8_9PRE7/
646 some bugs fixed markom 8187d 00h /or1k/tags/MW_0_8_9PRE7/
645 simple frame buffer peripheral with test added markom 8187d 04h /or1k/tags/MW_0_8_9PRE7/
644 Modified logging of SPR accesses. Logging only explicit instruction accesses. ivang 8187d 23h /or1k/tags/MW_0_8_9PRE7/
643 Quick bug fix. ivang 8187d 23h /or1k/tags/MW_0_8_9PRE7/
642 Modified logging of SPR accesses. Logging only explicit instruction accesses. ivang 8187d 23h /or1k/tags/MW_0_8_9PRE7/
641 Modified logging of SPR accesses. Logging only explicit instruction accesses. ivang 8188d 00h /or1k/tags/MW_0_8_9PRE7/
640 Merge profiler and mprofiler with sim. ivang 8188d 01h /or1k/tags/MW_0_8_9PRE7/
639 MMU cache inhibit bit test added. simons 8190d 16h /or1k/tags/MW_0_8_9PRE7/
638 TLBTR CI bit is now working properly. simons 8190d 16h /or1k/tags/MW_0_8_9PRE7/
637 Updated file names. lampret 8190d 17h /or1k/tags/MW_0_8_9PRE7/
636 Fixed combinational loops. lampret 8190d 17h /or1k/tags/MW_0_8_9PRE7/

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