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[/] [or1k/] [tags/] [nog_patch_34/] [or1ksim/] [cache/] - Rev 1766

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Rev Log message Author Age Path
1765 root 5662d 01h /or1k/tags/nog_patch_34/or1ksim/cache/
1393 This commit was manufactured by cvs2svn to create tag 'nog_patch_34'. 7102d 08h /or1k/tags/nog_patch_34/or1ksim/cache/
1386 Rework exception handling nogj 7108d 12h /or1k/tags/nog_patch_34/or1ksim/cache/
1382 Nir Mor:
Implemented DCCFGR, ICCFGR, DMMUCFGR and IMMUCFGR spr registers.
nogj 7117d 12h /or1k/tags/nog_patch_34/or1ksim/cache/
1376 aclocal && autoconf && automake phoenix 7136d 12h /or1k/tags/nog_patch_34/or1ksim/cache/
1358 Modularise config file parseing. Paving the way for further modularisation. nogj 7143d 03h /or1k/tags/nog_patch_34/or1ksim/cache/
1350 Mark a simulated cpu address as such, by introducing the new oraddr_t type nogj 7152d 06h /or1k/tags/nog_patch_34/or1ksim/cache/
1344 * Avoid doing a store in *every* instruction executed by storeing the instruction function unit in or32_opcodes nogj 7165d 10h /or1k/tags/nog_patch_34/or1ksim/cache/
1308 Gyorgy Jeney: extensive cleanup phoenix 7357d 01h /or1k/tags/nog_patch_34/or1ksim/cache/
1249 Downgrading back to automake-1.4 lampret 7522d 01h /or1k/tags/nog_patch_34/or1ksim/cache/
1117 Ignore generated files for CVS purposes sfurman 7865d 01h /or1k/tags/nog_patch_34/or1ksim/cache/
1099 cvs bug fixed markom 7951d 13h /or1k/tags/nog_patch_34/or1ksim/cache/
1085 Bug fixed. simons 7964d 03h /or1k/tags/nog_patch_34/or1ksim/cache/
997 PRINTF should be used instead of printf; command redirection repaired markom 8053d 15h /or1k/tags/nog_patch_34/or1ksim/cache/
992 A bug when cache enabled and bus error comes fixed. simons 8055d 07h /or1k/tags/nog_patch_34/or1ksim/cache/
970 Testbench is now running on ORP architecture platform. simons 8061d 02h /or1k/tags/nog_patch_34/or1ksim/cache/
884 code cleaning - a lot of global variables moved to runtime struct markom 8097d 14h /or1k/tags/nog_patch_34/or1ksim/cache/
876 Beta release of ATA simulation rherveille 8105d 01h /or1k/tags/nog_patch_34/or1ksim/cache/
638 TLBTR CI bit is now working properly. simons 8256d 03h /or1k/tags/nog_patch_34/or1ksim/cache/
631 Real cache access is simulated now. simons 8259d 02h /or1k/tags/nog_patch_34/or1ksim/cache/

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