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[/] [or1k/] [tags/] [nog_patch_36/] [or1ksim/] [cache/] - Rev 1773

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Rev Log message Author Age Path
1765 root 5627d 21h /or1k/tags/nog_patch_36/or1ksim/cache/
1397 This commit was manufactured by cvs2svn to create tag 'nog_patch_36'. 7068d 04h /or1k/tags/nog_patch_36/or1ksim/cache/
1386 Rework exception handling nogj 7074d 08h /or1k/tags/nog_patch_36/or1ksim/cache/
1382 Nir Mor:
Implemented DCCFGR, ICCFGR, DMMUCFGR and IMMUCFGR spr registers.		 nogj 7083d 08h /or1k/tags/nog_patch_36/or1ksim/cache/
1376 aclocal && autoconf && automake phoenix 7102d 08h /or1k/tags/nog_patch_36/or1ksim/cache/
1358 Modularise config file parseing. Paving the way for further modularisation. nogj 7108d 23h /or1k/tags/nog_patch_36/or1ksim/cache/
1350 Mark a simulated cpu address as such, by introducing the new oraddr_t type nogj 7118d 02h /or1k/tags/nog_patch_36/or1ksim/cache/
1344 * Avoid doing a store in *every* instruction executed by storeing the instruction function unit in or32_opcodes nogj 7131d 06h /or1k/tags/nog_patch_36/or1ksim/cache/
1308 Gyorgy Jeney: extensive cleanup phoenix 7322d 21h /or1k/tags/nog_patch_36/or1ksim/cache/
1249 Downgrading back to automake-1.4 lampret 7487d 21h /or1k/tags/nog_patch_36/or1ksim/cache/
1117 Ignore generated files for CVS purposes sfurman 7830d 21h /or1k/tags/nog_patch_36/or1ksim/cache/
1099 cvs bug fixed markom 7917d 08h /or1k/tags/nog_patch_36/or1ksim/cache/
1085 Bug fixed. simons 7929d 23h /or1k/tags/nog_patch_36/or1ksim/cache/
997 PRINTF should be used instead of printf; command redirection repaired markom 8019d 11h /or1k/tags/nog_patch_36/or1ksim/cache/
992 A bug when cache enabled and bus error comes fixed. simons 8021d 03h /or1k/tags/nog_patch_36/or1ksim/cache/
970 Testbench is now running on ORP architecture platform. simons 8026d 22h /or1k/tags/nog_patch_36/or1ksim/cache/
884 code cleaning - a lot of global variables moved to runtime struct markom 8063d 10h /or1k/tags/nog_patch_36/or1ksim/cache/
876 Beta release of ATA simulation rherveille 8070d 21h /or1k/tags/nog_patch_36/or1ksim/cache/
638 TLBTR CI bit is now working properly. simons 8221d 23h /or1k/tags/nog_patch_36/or1ksim/cache/
631 Real cache access is simulated now. simons 8224d 22h /or1k/tags/nog_patch_36/or1ksim/cache/

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