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[/] [or1k/] [tags/] [nog_patch_37/] [or1ksim/] [cache/] - Rev 1765

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Rev Log message Author Age Path
1765 root 5599d 04h /or1k/tags/nog_patch_37/or1ksim/cache/
1399 This commit was manufactured by cvs2svn to create tag 'nog_patch_37'. 7039d 11h /or1k/tags/nog_patch_37/or1ksim/cache/
1386 Rework exception handling nogj 7045d 15h /or1k/tags/nog_patch_37/or1ksim/cache/
1382 Nir Mor:
Implemented DCCFGR, ICCFGR, DMMUCFGR and IMMUCFGR spr registers.		 nogj 7054d 15h /or1k/tags/nog_patch_37/or1ksim/cache/
1376 aclocal && autoconf && automake phoenix 7073d 15h /or1k/tags/nog_patch_37/or1ksim/cache/
1358 Modularise config file parseing. Paving the way for further modularisation. nogj 7080d 06h /or1k/tags/nog_patch_37/or1ksim/cache/
1350 Mark a simulated cpu address as such, by introducing the new oraddr_t type nogj 7089d 09h /or1k/tags/nog_patch_37/or1ksim/cache/
1344 * Avoid doing a store in *every* instruction executed by storeing the instruction function unit in or32_opcodes nogj 7102d 13h /or1k/tags/nog_patch_37/or1ksim/cache/
1308 Gyorgy Jeney: extensive cleanup phoenix 7294d 04h /or1k/tags/nog_patch_37/or1ksim/cache/
1249 Downgrading back to automake-1.4 lampret 7459d 04h /or1k/tags/nog_patch_37/or1ksim/cache/
1117 Ignore generated files for CVS purposes sfurman 7802d 04h /or1k/tags/nog_patch_37/or1ksim/cache/
1099 cvs bug fixed markom 7888d 15h /or1k/tags/nog_patch_37/or1ksim/cache/
1085 Bug fixed. simons 7901d 05h /or1k/tags/nog_patch_37/or1ksim/cache/
997 PRINTF should be used instead of printf; command redirection repaired markom 7990d 18h /or1k/tags/nog_patch_37/or1ksim/cache/
992 A bug when cache enabled and bus error comes fixed. simons 7992d 10h /or1k/tags/nog_patch_37/or1ksim/cache/
970 Testbench is now running on ORP architecture platform. simons 7998d 05h /or1k/tags/nog_patch_37/or1ksim/cache/
884 code cleaning - a lot of global variables moved to runtime struct markom 8034d 16h /or1k/tags/nog_patch_37/or1ksim/cache/
876 Beta release of ATA simulation rherveille 8042d 04h /or1k/tags/nog_patch_37/or1ksim/cache/
638 TLBTR CI bit is now working properly. simons 8193d 06h /or1k/tags/nog_patch_37/or1ksim/cache/
631 Real cache access is simulated now. simons 8196d 05h /or1k/tags/nog_patch_37/or1ksim/cache/

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