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[/] [or1k/] [tags/] [nog_patch_41/] - Rev 994

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Rev Log message Author Age Path
994 Store buffer has been tested and it works. BY default it is still disabled until uClinux confirms correct operation on FPGA board. lampret 7999d 22h /or1k/tags/nog_patch_41/
993 Fixed IMMU bug. lampret 7999d 22h /or1k/tags/nog_patch_41/
992 A bug when cache enabled and bus error comes fixed. simons 8000d 07h /or1k/tags/nog_patch_41/
991 Different memory controller. simons 8000d 07h /or1k/tags/nog_patch_41/
990 Test is now complete. simons 8000d 07h /or1k/tags/nog_patch_41/
989 c++ is making problems so, for now, it is excluded. simons 8001d 15h /or1k/tags/nog_patch_41/
988 ORP architecture supported. simons 8002d 07h /or1k/tags/nog_patch_41/
987 ORP architecture supported. simons 8002d 14h /or1k/tags/nog_patch_41/
986 outputs out of function are not registered anymore markom 8002d 15h /or1k/tags/nog_patch_41/
985 DTLB translation doesn't work on or1ksim when IC/DC enabled. lampret 8003d 02h /or1k/tags/nog_patch_41/
984 Disable SB until it is tested lampret 8003d 02h /or1k/tags/nog_patch_41/
983 First checkin lampret 8003d 04h /or1k/tags/nog_patch_41/
982 Moved to sim/bin lampret 8003d 04h /or1k/tags/nog_patch_41/
981 First checkin. lampret 8003d 04h /or1k/tags/nog_patch_41/
980 Removed sim.tcl that shouldn't be here. lampret 8003d 04h /or1k/tags/nog_patch_41/
979 Removed old test case binaries. lampret 8003d 04h /or1k/tags/nog_patch_41/
978 Added variable delay for SRAM. lampret 8003d 04h /or1k/tags/nog_patch_41/
977 Added store buffer. lampret 8003d 04h /or1k/tags/nog_patch_41/
976 Added store buffer lampret 8003d 04h /or1k/tags/nog_patch_41/
975 First checkin lampret 8003d 04h /or1k/tags/nog_patch_41/

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