OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [nog_patch_56/] - Rev 450

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
450 Exceptions are allways enabled. simons 8234d 15h /or1k/tags/nog_patch_56/
449 MMU test configuration. simons 8235d 15h /or1k/tags/nog_patch_56/
448 Permission test added. simons 8235d 16h /or1k/tags/nog_patch_56/
447 ITLBMR register bit fields set in order. simons 8235d 16h /or1k/tags/nog_patch_56/
446 ITLBMR register bit fields set in order. simons 8235d 16h /or1k/tags/nog_patch_56/
445 Reading GPIO input reg now also returns values on output bits erez 8235d 18h /or1k/tags/nog_patch_56/
444 Added GPIO simulation erez 8236d 02h /or1k/tags/nog_patch_56/
443 Text and data sections are put in ram. simons 8236d 06h /or1k/tags/nog_patch_56/
442 VAPI can now accept requests for different device ids on the same stream erez 8236d 09h /or1k/tags/nog_patch_56/
441 Two instructions removed from reset wrapper to save space. simons 8236d 10h /or1k/tags/nog_patch_56/
440 Changed VAPI device ID in log file to 16 bits erez 8236d 10h /or1k/tags/nog_patch_56/
439 Added "fake" JTAG proxy log to vapi log file erez 8236d 10h /or1k/tags/nog_patch_56/
438 ITLB -> DTLB lapsus fixed. simons 8236d 11h /or1k/tags/nog_patch_56/
437 When lsu instruction produce exception registers are preserved. simons 8236d 11h /or1k/tags/nog_patch_56/
436 Copying from flash to ram only when there is 0xff on address 0. simons 8236d 11h /or1k/tags/nog_patch_56/
435 Initial revision. simons 8236d 13h /or1k/tags/nog_patch_56/
434 isblank changed to isspace markom 8236d 16h /or1k/tags/nog_patch_56/
433 clkcycle parameter added to configuration markom 8236d 16h /or1k/tags/nog_patch_56/
432 added missing basic.S file markom 8236d 16h /or1k/tags/nog_patch_56/
431 stepping over breakpoint added markom 8236d 17h /or1k/tags/nog_patch_56/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.