OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [nog_patch_57/] - Rev 992

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
992 A bug when cache enabled and bus error comes fixed. simons 8030d 16h /or1k/tags/nog_patch_57/
991 Different memory controller. simons 8030d 16h /or1k/tags/nog_patch_57/
990 Test is now complete. simons 8030d 16h /or1k/tags/nog_patch_57/
989 c++ is making problems so, for now, it is excluded. simons 8032d 00h /or1k/tags/nog_patch_57/
988 ORP architecture supported. simons 8032d 16h /or1k/tags/nog_patch_57/
987 ORP architecture supported. simons 8032d 23h /or1k/tags/nog_patch_57/
986 outputs out of function are not registered anymore markom 8033d 00h /or1k/tags/nog_patch_57/
985 DTLB translation doesn't work on or1ksim when IC/DC enabled. lampret 8033d 11h /or1k/tags/nog_patch_57/
984 Disable SB until it is tested lampret 8033d 11h /or1k/tags/nog_patch_57/
983 First checkin lampret 8033d 13h /or1k/tags/nog_patch_57/
982 Moved to sim/bin lampret 8033d 13h /or1k/tags/nog_patch_57/
981 First checkin. lampret 8033d 13h /or1k/tags/nog_patch_57/
980 Removed sim.tcl that shouldn't be here. lampret 8033d 13h /or1k/tags/nog_patch_57/
979 Removed old test case binaries. lampret 8033d 13h /or1k/tags/nog_patch_57/
978 Added variable delay for SRAM. lampret 8033d 14h /or1k/tags/nog_patch_57/
977 Added store buffer. lampret 8033d 14h /or1k/tags/nog_patch_57/
976 Added store buffer lampret 8033d 14h /or1k/tags/nog_patch_57/
975 First checkin lampret 8033d 14h /or1k/tags/nog_patch_57/
974 Enabled what works on or1ksim and disabled other tests. lampret 8033d 16h /or1k/tags/nog_patch_57/
973 generated cuc top scheduler builds without syntax errors; not tested yet markom 8035d 20h /or1k/tags/nog_patch_57/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.