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Subversion Repositories or1k

[/] [or1k/] [tags/] [nog_patch_62/] [or1ksim/] [cpu/] - Rev 25

Rev	Log message	Author	Age	Path
25	Bug fix in handling labels when loading code into simulator memory.	lampret	8834d 23h	/or1k/tags/nog_patch_62/or1ksim/cpu/
24	Static branch prediction added.	lampret	8834d 23h	/or1k/tags/nog_patch_62/or1ksim/cpu/
23	Common OR1K backend for OR32 and OR16.	lampret	8834d 23h	/or1k/tags/nog_patch_62/or1ksim/cpu/
22	More modifications related to or16.	lampret	8837d 05h	/or1k/tags/nog_patch_62/or1ksim/cpu/
20	or1k renamed to or32.	lampret	8837d 18h	/or1k/tags/nog_patch_62/or1ksim/cpu/
19	Added or16, or1k renamed to or32.	lampret	8837d 19h	/or1k/tags/nog_patch_62/or1ksim/cpu/
18	or16 added, or1k renamed to or32.	lampret	8837d 19h	/or1k/tags/nog_patch_62/or1ksim/cpu/
13	Rebuild of the generated files.	jrydberg	8898d 11h	/or1k/tags/nog_patch_62/or1ksim/cpu/
8	Initial revision.	jrydberg	8898d 11h	/or1k/tags/nog_patch_62/or1ksim/cpu/
7	Major update of the enviorment. Now uses autoconf and automake. The simulator uses readline aswell to get input from the user. A number of new files added, some modified. The libc directory is now called support.	jrydberg	8898d 11h	/or1k/tags/nog_patch_62/or1ksim/cpu/
6	Just a regular update with exception of cache simulation. MMU simulation still under development.	lampret	8899d 05h	/or1k/tags/nog_patch_62/or1ksim/cpu/
3	This commit was generated by cvs2svn to compensate for changes in r2, which included commits to RCS files with non-trunk default branches.	cvs	9024d 23h	/or1k/tags/nog_patch_62/or1ksim/cpu/