OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [nog_patch_65/] [or1ksim/] - Rev 1121

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
1121 Ignore generated files sfurman 7792d 19h /or1k/tags/nog_patch_65/or1ksim/
1120 Fix my dumb automake bustage sfurman 7792d 19h /or1k/tags/nog_patch_65/or1ksim/
1119 1) Fix the "channels:xterm" feature so that it functions on linux.
The existing implementation relies on SysV STREAMS behavior that
Linux does not possess.

2) Allow arguments to be passed to the xterm from the sim.cfg file,
e.g. to set the window dimensions or fonts.

3) Add the ability for a program to interact with the simulator UART
through a TCP socket.		 sfurman 7793d 15h /or1k/tags/nog_patch_65/or1ksim/
1118 1) Fix the "channels:xterm" feature so that it functions on linux.
The existing implementation relies on SysV STREAMS behavior that
Linux does not possess.

2) Allow arguments to be passed to the xterm from the sim.cfg file,
e.g. to set the window dimensions or fonts.

3) Add the ability for a program to interact with the simulator UART
through a TCP socket.		 sfurman 7793d 16h /or1k/tags/nog_patch_65/or1ksim/
1117 Ignore generated files for CVS purposes sfurman 7793d 16h /or1k/tags/nog_patch_65/or1ksim/
1116 There was a bug in the simulator's UART implementation that caused the
UART's LSR register to become corrupted. This was due to an
assumption that 'char' is an unsigned type, but that is not true on
all platforms.

When the char type is signed and a character is read in the range
0x80-0xff, the high bit is sign-extended into the upper bits of an
entry in the receive FIFO. When the character reaches the head of the
FIFO, the upper bits of the FIFO entry are OR'ed into the LSR, causing
the LSR to be set to 0xFF.

A simple cast fixes the problem.		 sfurman 7793d 16h /or1k/tags/nog_patch_65/or1ksim/
1114 Added cvs log keywords lampret 7824d 11h /or1k/tags/nog_patch_65/or1ksim/
1106 Cache invalidate bug fixed again (it was ok before). simons 7873d 23h /or1k/tags/nog_patch_65/or1ksim/
1103 sync problem in cuc not yet fixed markom 7880d 00h /or1k/tags/nog_patch_65/or1ksim/
1102 few cuc bug fixes markom 7880d 00h /or1k/tags/nog_patch_65/or1ksim/
1101 cuc now compiles markom 7880d 03h /or1k/tags/nog_patch_65/or1ksim/
1100 cvs problem fixed markom 7880d 03h /or1k/tags/nog_patch_65/or1ksim/
1099 cvs bug fixed markom 7880d 03h /or1k/tags/nog_patch_65/or1ksim/
1098 small bug in cuc fixed markom 7880d 03h /or1k/tags/nog_patch_65/or1ksim/
1097 Cache invalidate bug fixed. simons 7880d 17h /or1k/tags/nog_patch_65/or1ksim/
1095 eval_reg replaced with the new evalsim_reg32 lampret 7887d 11h /or1k/tags/nog_patch_65/or1ksim/
1086 STACK_ARGS is getting obsolete and is only needed by simprintf, which needs it to be 0. lampret 7887d 13h /or1k/tags/nog_patch_65/or1ksim/
1085 Bug fixed. simons 7892d 17h /or1k/tags/nog_patch_65/or1ksim/
1082 channels integration rprescott 7907d 13h /or1k/tags/nog_patch_65/or1ksim/
1081 or32-uclinux tool chain have to be used to build the testbench. simons 7915d 05h /or1k/tags/nog_patch_65/or1ksim/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.