OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [nog_patch_67/] [or1ksim/] [cpu/] - Rev 1436

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
1436 Rearange some code to make it clearer what it does nogj 7003d 08h /or1k/tags/nog_patch_67/or1ksim/cpu/
1434 Fix the prototype of setsim_reg nogj 7003d 08h /or1k/tags/nog_patch_67/or1ksim/cpu/
1432 Collect most of the cpu state variables in a structure (cpu_state) nogj 7003d 08h /or1k/tags/nog_patch_67/or1ksim/cpu/
1430 Log SPR_SR in the execution log nogj 7003d 08h /or1k/tags/nog_patch_67/or1ksim/cpu/
1428 Remove useless indirection: check_depend()->depend_operands() nogj 7003d 08h /or1k/tags/nog_patch_67/or1ksim/cpu/
1404 Move the function of ic_clock() to mtspr() and remove it nogj 7003d 08h /or1k/tags/nog_patch_67/or1ksim/cpu/
1402 Do what dc_clock() did in mtspr() and remove it nogj 7003d 08h /or1k/tags/nog_patch_67/or1ksim/cpu/
1398 Correct incorrect calls to eval_direct8 nogj 7003d 08h /or1k/tags/nog_patch_67/or1ksim/cpu/
1386 Rework exception handling nogj 7009d 11h /or1k/tags/nog_patch_67/or1ksim/cpu/
1384 Fix the parameters to the l.ff1/l.maci instructions nogj 7018d 11h /or1k/tags/nog_patch_67/or1ksim/cpu/
1382 Nir Mor:
Implemented DCCFGR, ICCFGR, DMMUCFGR and IMMUCFGR spr registers.		 nogj 7018d 12h /or1k/tags/nog_patch_67/or1ksim/cpu/
1376 aclocal && autoconf && automake phoenix 7037d 12h /or1k/tags/nog_patch_67/or1ksim/cpu/
1375 Remove FAST_SIM, it nolonger provides a speed up nogj 7044d 03h /or1k/tags/nog_patch_67/or1ksim/cpu/
1362 initialise dev_mem->chip_select in register_memory nogj 7044d 03h /or1k/tags/nog_patch_67/or1ksim/cpu/
1359 Pass private data in readfunc/writefunc callbacks nogj 7044d 03h /or1k/tags/nog_patch_67/or1ksim/cpu/
1358 Modularise config file parseing. Paving the way for further modularisation. nogj 7044d 03h /or1k/tags/nog_patch_67/or1ksim/cpu/
1354 typing fixes phoenix 7052d 09h /or1k/tags/nog_patch_67/or1ksim/cpu/
1353 Modularise simulator command parsing nogj 7053d 05h /or1k/tags/nog_patch_67/or1ksim/cpu/
1352 Optimise execution history tracking nogj 7053d 06h /or1k/tags/nog_patch_67/or1ksim/cpu/
1350 Mark a simulated cpu address as such, by introducing the new oraddr_t type nogj 7053d 06h /or1k/tags/nog_patch_67/or1ksim/cpu/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.