OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [nog_patch_69/] [or1ksim/] [cpu/] [dlx/] - Rev 1765

Rev

Filtering Options

Clear current filter

Rev Log message Author Age Path
1765 root 5578d 01h /or1k/tags/nog_patch_69/or1ksim/cpu/dlx/
1464 This commit was manufactured by cvs2svn to create tag 'nog_patch_69'. 7018d 07h /or1k/tags/nog_patch_69/or1ksim/cpu/dlx/
1376 aclocal && autoconf && automake phoenix 7052d 12h /or1k/tags/nog_patch_69/or1ksim/cpu/dlx/
1249 Downgrading back to automake-1.4 lampret 7438d 01h /or1k/tags/nog_patch_69/or1ksim/cpu/dlx/
997 PRINTF should be used instead of printf; command redirection repaired markom 7969d 15h /or1k/tags/nog_patch_69/or1ksim/cpu/dlx/
879 Initial version of OpenRISC Custom Unit Compiler added markom 8019d 07h /or1k/tags/nog_patch_69/or1ksim/cpu/dlx/
538 memory width increased to 32bit; new memory test mem_test added - simple big endian test markom 8196d 14h /or1k/tags/nog_patch_69/or1ksim/cpu/dlx/
500 Added .cvsignore files for annoying generated files erez 8202d 13h /or1k/tags/nog_patch_69/or1ksim/cpu/dlx/
393 messages: exception on many places changed to abort markom 8237d 17h /or1k/tags/nog_patch_69/or1ksim/cpu/dlx/
247 Major update of the enviorment. Now uses autoconf and automake. The
simulator uses readline aswell to get input from the user. A number of
new files added, some modified. The libc directory is now called support.
jrydberg 8267d 20h /or1k/tags/nog_patch_69/or1ksim/cpu/dlx/
245 Initial revision cvs 8267d 20h /or1k/tags/nog_patch_69/or1ksim/cpu/dlx/
221 major changes to testbench; debug unit is moved to /debug; memory organization can be customized; UART from simons; overall cleanup markom 8272d 13h /or1k/tags/nog_patch_69/or1ksim/cpu/dlx/
123 Bugs fixed:
- l.rfe temporarly disables exceptions
- l.sys does PC -= 4
- breakpoints now supported at peripheria locations
- uart0.rt/.tx nonexistent file segment fault

Other modifications:
- replaced string names to instruction indexes
- execute.c executes specified (in ISA table) function
- modified ISA table - flag needed for gdb
- added or32.c, which supports or32.h
- added new instructions l.mac, l.msb, l.maci, l.macrc
and their executing functions (opcodes to be revisited)
- added header acconfig.h
- modified configuration files
markom 8406d 10h /or1k/tags/nog_patch_69/or1ksim/cpu/dlx/
77 Regular update. lampret 8631d 16h /or1k/tags/nog_patch_69/or1ksim/cpu/dlx/
30 Updated SPRs, exceptions. Added 16450 device. lampret 8778d 01h /or1k/tags/nog_patch_69/or1ksim/cpu/dlx/
26 Clean up. lampret 8808d 20h /or1k/tags/nog_patch_69/or1ksim/cpu/dlx/
18 or16 added, or1k renamed to or32. lampret 8811d 16h /or1k/tags/nog_patch_69/or1ksim/cpu/dlx/
8 Initial revision. jrydberg 8872d 08h /or1k/tags/nog_patch_69/or1ksim/cpu/dlx/
6 Just a regular update with exception of cache simulation. MMU simulation still under development. lampret 8873d 02h /or1k/tags/nog_patch_69/or1ksim/cpu/dlx/
3 This commit was generated by cvs2svn to compensate for changes in r2, which
included commits to RCS files with non-trunk default branches.
cvs 8998d 20h /or1k/tags/nog_patch_69/or1ksim/cpu/dlx/

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.