OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [nog_patch_71/] - Rev 68

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
68 Added hook for l.sys 204. Changed SPR of flag (no more CCR) lampret 8698d 15h /or1k/tags/nog_patch_71/
67 Added simulator "application load". lampret 8698d 15h /or1k/tags/nog_patch_71/
66 Added another set of eval_ functions that should be used directly by simulator.
evalsim_ and setsim_ don't go through MMU transaltion mechanism.		 lampret 8698d 15h /or1k/tags/nog_patch_71/
65 Added DMMU stats. lampret 8698d 15h /or1k/tags/nog_patch_71/
64 SPR bit definition moved to spr_defs.h. lampret 8698d 15h /or1k/tags/nog_patch_71/
63 Fixed a bug in getsprbits/setsprbits functions (now mask can have arbitry
alignment of bits).		 lampret 8698d 15h /or1k/tags/nog_patch_71/
62 OR1K DMMU model. lampret 8698d 16h /or1k/tags/nog_patch_71/
61 2000-09-26 Joel Sherrill <joel@OARcorp.com>

* libc/sys/rtems/include/pthread.h: Added file missed by earlier
commit of RTEMS modifications.		 joel 8713d 10h /or1k/tags/nog_patch_71/
60 Memory model changed. lampret 8733d 19h /or1k/tags/nog_patch_71/
59 2000-09-05 Joel Sherrill <joel@OARcorp.com>

* Merged newlib-1.8.2-rtems-20000905.diff which includes
or16 and or32 configuration support.		 joel 8734d 06h /or1k/tags/nog_patch_71/
57 This commit was generated by cvs2svn to compensate for changes in r56, which
included commits to RCS files with non-trunk default branches.		 joel 8740d 04h /or1k/tags/nog_patch_71/
55 Added 'dv' command for dumping memory as verilog model. lampret 8749d 16h /or1k/tags/nog_patch_71/
54 Regular maintenance. lampret 8749d 16h /or1k/tags/nog_patch_71/
53 Added setjmp/longjmp. lampret 8754d 16h /or1k/tags/nog_patch_71/
52 Comment character changed. lampret 8810d 11h /or1k/tags/nog_patch_71/
51 Exception detection changed a bit. lampret 8810d 11h /or1k/tags/nog_patch_71/
50 Added CURINSN macro. lampret 8810d 11h /or1k/tags/nog_patch_71/
49 Changed simulation mode to non-virtual (real). lampret 8810d 11h /or1k/tags/nog_patch_71/
48 Added CCR. lampret 8810d 12h /or1k/tags/nog_patch_71/
47 Added interrupt recognition and better memory dump. lampret 8810d 12h /or1k/tags/nog_patch_71/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.