OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [nog_patch_72/] - Rev 352

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
352 OR1200_REGISTERED_OUTPUTS can now be enabled. lampret 8296d 09h /or1k/tags/nog_patch_72/
351 Fixed some l.trap typos. lampret 8296d 10h /or1k/tags/nog_patch_72/
350 For GDB changed single stepping and disabled trap exception. lampret 8296d 12h /or1k/tags/nog_patch_72/
349 Some bugs regarding cache simulation fixed. simons 8298d 00h /or1k/tags/nog_patch_72/
348 Added instructions on how to build configure. ivang 8299d 08h /or1k/tags/nog_patch_72/
347 Added CRC32 calculation to Ethernet erez 8300d 05h /or1k/tags/nog_patch_72/
346 Improved Ethernet simulation erez 8300d 07h /or1k/tags/nog_patch_72/
345 Added check for net/ethernet.h (needed by ethernet simulator) erez 8300d 07h /or1k/tags/nog_patch_72/
344 added acv test for uart; sim debug now has verbose levels; lot of bugs fixed in uart model markom 8300d 09h /or1k/tags/nog_patch_72/
343 Small touches to test programs erez 8300d 11h /or1k/tags/nog_patch_72/
342 added exception vectors to support and modified section names markom 8301d 08h /or1k/tags/nog_patch_72/
341 added VAPI for uart; uart 16550 support, some bugs fixed markom 8301d 10h /or1k/tags/nog_patch_72/
340 Added hpint vector lampret 8301d 10h /or1k/tags/nog_patch_72/
339 Added setpc test lampret 8301d 10h /or1k/tags/nog_patch_72/
338 Added 'setpc'. Renamed some signals (except_flushpipe into flushpipe etc) lampret 8301d 10h /or1k/tags/nog_patch_72/
337 Fixed tick timer interrupt reporting by using TTCR[IP] bit. lampret 8301d 10h /or1k/tags/nog_patch_72/
336 VAPI works markom 8302d 06h /or1k/tags/nog_patch_72/
335 some small bugs fixed markom 8302d 07h /or1k/tags/nog_patch_72/
334 removed vapi client file markom 8302d 10h /or1k/tags/nog_patch_72/
333 small bug fixed markom 8302d 13h /or1k/tags/nog_patch_72/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.