| Rev |
Log message |
Author |
Age |
Path |
| 1765 |
|
root |
5577d 05h |
/or1k/tags/rel-0-3-0-rc1/or1ksim/cache/ |
| 1749 |
This commit was manufactured by cvs2svn to create tag 'rel-0-3-0-rc1'. |
|
5726d 10h |
/or1k/tags/rel-0-3-0-rc1/or1ksim/cache/ |
| 1748 |
These are all the changes for Or1ksim 0.3.0 release candidate 1. The changes
are explained in the NEWS, README and ChangeLog files. A number of
long-standing bugs are fixed (see the OpenRISC tracker), and the code is
brought up to a consistent standard, following the GNU coding conventions
throughout.
Argument parsing now uses argtable2, and a User Guide has been added.
Documentation throughout has been extended to be compatible with Doxygen,
providing a further level of technical detail on the internals. |
jeremybennett |
5726d 10h |
/or1k/tags/rel-0-3-0-rc1/or1ksim/cache/ |
| 1745 |
These are the changes to allow or1ksim to build as a library as well as a standalone simulator. The concept of a "generic" peripheral is added, which will commuicate with an external model via upcalls. |
jeremybennett |
5762d 10h |
/or1k/tags/rel-0-3-0-rc1/or1ksim/cache/ |
| 1743 |
Changes to bring behavior into line with the current OpenRISC 1000 specification and support GDB 6.8. A couple of small bugs with handling xterms and opening the remote debug channel are also fixed. Header files have been added to sources in Makefile.am files where they are missing, so that "make tags" will include them. Makefile.in files have been regenerated due to these changes. |
jeremybennett |
5763d 09h |
/or1k/tags/rel-0-3-0-rc1/or1ksim/cache/ |
| 1731 |
Move ic configuration out of the global config struct. Register ic callbacks
instead of haveing static calls to the functions. |
nogj |
6721d 20h |
/or1k/tags/rel-0-3-0-rc1/or1ksim/cache/ |
| 1730 |
Avoid array lookups as far as possible. Precalculate as much as possible.
Increases performance when running with ic. |
nogj |
6721d 20h |
/or1k/tags/rel-0-3-0-rc1/or1ksim/cache/ |
| 1649 |
Mark as many functions as possible static |
nogj |
6723d 09h |
/or1k/tags/rel-0-3-0-rc1/or1ksim/cache/ |
| 1576 |
configure updates |
phoenix |
6836d 05h |
/or1k/tags/rel-0-3-0-rc1/or1ksim/cache/ |
| 1557 |
Fix most warnings issued by gcc4 |
nogj |
6859d 19h |
/or1k/tags/rel-0-3-0-rc1/or1ksim/cache/ |
| 1555 |
* Moved log2_int() from cuc/cuc.c as it is usefull for other things aswell.
* Changed code to use log2_int() instead of log2(), which is also a builtin
library function (fixes compile on gcc4).
* Moved is_power2() from sim-config.c to misc.c. |
nogj |
6859d 19h |
/or1k/tags/rel-0-3-0-rc1/or1ksim/cache/ |
| 1506 |
* Remove very slow {set,test}sprbit{,s} functions.
* Remove uses of getsprbits in time critical functions. |
nogj |
6926d 16h |
/or1k/tags/rel-0-3-0-rc1/or1ksim/cache/ |
| 1486 |
* Seporate out the code used for handling the memory peripheral to peripheral/memory.c
* Mostly decouple the memory controller from the internals of the memory handling.
* Rewrite memory handling to be more linear and thus much faster.
* Issue a bus error on read/write with invalid granularity. |
nogj |
6969d 17h |
/or1k/tags/rel-0-3-0-rc1/or1ksim/cache/ |
| 1432 |
Collect most of the cpu state variables in a structure (cpu_state) |
nogj |
7017d 12h |
/or1k/tags/rel-0-3-0-rc1/or1ksim/cache/ |
| 1406 |
Fix the declaration of `sec' in reg_ic_sec |
nogj |
7017d 12h |
/or1k/tags/rel-0-3-0-rc1/or1ksim/cache/ |
| 1404 |
Move the function of ic_clock() to mtspr() and remove it |
nogj |
7017d 12h |
/or1k/tags/rel-0-3-0-rc1/or1ksim/cache/ |
| 1402 |
Do what dc_clock() did in mtspr() and remove it |
nogj |
7017d 12h |
/or1k/tags/rel-0-3-0-rc1/or1ksim/cache/ |
| 1386 |
Rework exception handling |
nogj |
7023d 16h |
/or1k/tags/rel-0-3-0-rc1/or1ksim/cache/ |
| 1382 |
Nir Mor:
Implemented DCCFGR, ICCFGR, DMMUCFGR and IMMUCFGR spr registers. |
nogj |
7032d 16h |
/or1k/tags/rel-0-3-0-rc1/or1ksim/cache/ |
| 1376 |
aclocal && autoconf && automake |
phoenix |
7051d 16h |
/or1k/tags/rel-0-3-0-rc1/or1ksim/cache/ |
