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[/] [or1k/] [tags/] [rel-0-3-0-rc1/] [or1ksim/] [cpu/] [or1k/] - Rev 1308

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Rev Log message Author Age Path
1308 Gyorgy Jeney: extensive cleanup phoenix 7321d 04h /or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/
1302 compile fix (remove const) phoenix 7339d 02h /or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/
1263 simprintf now uses stack vargs -- same as printf markom 7436d 18h /or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/
1256 page size is 8192 on or32 phoenix 7477d 07h /or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/
1249 Downgrading back to automake-1.4 lampret 7486d 04h /or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/
1244 Added "cm" command to copy data inside memory.
Make or1ksim work on little endian platforms.
Port to Mac OS X.
Some bugfixes.
Allow JTAG write access to read-only memory regions.		 hpanther 7488d 13h /or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/
1203 value stored in ITLB and DTLB match registers was wrong. fixed. phoenix 7572d 23h /or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/
1202 at exception print insn number to ease debugging phoenix 7573d 00h /or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/
1169 Added support for l.addc instruction. csanchez 7705d 08h /or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/
1117 Ignore generated files for CVS purposes sfurman 7829d 04h /or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/
1106 Cache invalidate bug fixed again (it was ok before). simons 7909d 11h /or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/
1097 Cache invalidate bug fixed. simons 7916d 06h /or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/
1086 STACK_ARGS is getting obsolete and is only needed by simprintf, which needs it to be 0. lampret 7923d 02h /or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/
1025 PRINTF/printf mess fixed. simons 8005d 07h /or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/
1024 Mess with printf/PRINTF fixed. Ethernet test changed to support latest changes. simons 8005d 16h /or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/
997 PRINTF should be used instead of printf; command redirection repaired markom 8017d 18h /or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/
970 Testbench is now running on ORP architecture platform. simons 8025d 05h /or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/
914 SR[FO] is always set to 1. lampret 8041d 18h /or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/
886 MMU registers reserved fields protected from writing. simons 8061d 11h /or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/
884 code cleaning - a lot of global variables moved to runtime struct markom 8061d 17h /or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/

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