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[/] [or1k/] [tags/] [rel-0-3-0-rc1/] [or1ksim/] [cpu/] [or1k/] - Rev 1745

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1745 These are the changes to allow or1ksim to build as a library as well as a standalone simulator. The concept of a "generic" peripheral is added, which will commuicate with an external model via upcalls. jeremybennett 5812d 02h /or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/
1744 Changes to bring behavior into line with the current OpenRISC 1000 specification and support GDB 6.8. A couple of small bugs with handling xterms and opening the remote debug channel are also fixed. Header files have been added to sources in Makefile.am files where they are missing, so that "make tags" will include them. Makefile.in files have been regenerated due to these changes. jeremybennett 5813d 01h /or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/
1743 Changes to bring behavior into line with the current OpenRISC 1000 specification and support GDB 6.8. A couple of small bugs with handling xterms and opening the remote debug channel are also fixed. Header files have been added to sources in Makefile.am files where they are missing, so that "make tags" will include them. Makefile.in files have been regenerated due to these changes. jeremybennett 5813d 01h /or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/
1720 Warning/spelling/gramer/useless comment removal fixes. nogj 6772d 23h /or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/
1715 Add the capability to the pic to simulate a level or edge triggered pic. Add
a clear_interrupt() function that the peripherals need to use to signal that
they negated their interrupt line.		 nogj 6772d 23h /or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/
1692 Instead of playing games with the esp when a jump needs to be executed, use
longjmp() to get to the jump handling code.		 nogj 6772d 23h /or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/
1686 Remove the immu_ex_from_insn hack. nogj 6772d 23h /or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/
1678 Remove the ts_current hack by haveing the temporaries always shipped out before
any instruction that has the posibility to generate an exception		 nogj 6773d 00h /or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/
1656 Pass the instruction operands as part of the op_queue structure. nogj 6773d 00h /or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/
1652 Avoid division and multiplication as far as possible (they are slow) nogj 6773d 00h /or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/
1585 added missing exception, fixes segfault with trap exception phoenix 6863d 22h /or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/
1579 Add missing break; statements nogj 6885d 09h /or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/
1576 configure updates phoenix 6885d 21h /or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/
1557 Fix most warnings issued by gcc4 nogj 6909d 11h /or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/
1555 * Moved log2_int() from cuc/cuc.c as it is usefull for other things aswell.
* Changed code to use log2_int() instead of log2(), which is also a builtin
library function (fixes compile on gcc4).
* Moved is_power2() from sim-config.c to misc.c.		 nogj 6909d 11h /or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/
1551 Remove the pcprev global nogj 6971d 00h /or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/
1550 * prototype() -> prototype(void) where appropriate.
* Use `static' where it can be used.		 nogj 6971d 00h /or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/
1549 Spelling fixes nogj 6971d 00h /or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/
1540 * Breakup the tick_job function into smaller ones.
* Fix lots of conner cases.
* Add tests for the tick timer.		 nogj 6971d 00h /or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/
1532 Add pretty spr dumping code nogj 6975d 00h /or1k/tags/rel-0-3-0-rc1/or1ksim/cpu/or1k/

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