OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [rel-0-3-0-rc1/] [or1ksim/] [debug/] - Rev 1765

Rev

Filtering Options

Clear current filter

Rev Log message Author Age Path
1765 root 5577d 15h /or1k/tags/rel-0-3-0-rc1/or1ksim/debug/
1749 This commit was manufactured by cvs2svn to create tag 'rel-0-3-0-rc1'. 5726d 20h /or1k/tags/rel-0-3-0-rc1/or1ksim/debug/
1748 These are all the changes for Or1ksim 0.3.0 release candidate 1. The changes
are explained in the NEWS, README and ChangeLog files. A number of
long-standing bugs are fixed (see the OpenRISC tracker), and the code is
brought up to a consistent standard, following the GNU coding conventions
throughout.

Argument parsing now uses argtable2, and a User Guide has been added.
Documentation throughout has been extended to be compatible with Doxygen,
providing a further level of technical detail on the internals.
jeremybennett 5726d 20h /or1k/tags/rel-0-3-0-rc1/or1ksim/debug/
1745 These are the changes to allow or1ksim to build as a library as well as a standalone simulator. The concept of a "generic" peripheral is added, which will commuicate with an external model via upcalls. jeremybennett 5762d 20h /or1k/tags/rel-0-3-0-rc1/or1ksim/debug/
1744 Changes to bring behavior into line with the current OpenRISC 1000 specification and support GDB 6.8. A couple of small bugs with handling xterms and opening the remote debug channel are also fixed. Header files have been added to sources in Makefile.am files where they are missing, so that "make tags" will include them. Makefile.in files have been regenerated due to these changes. jeremybennett 5763d 19h /or1k/tags/rel-0-3-0-rc1/or1ksim/debug/
1719 Use pretty spr dumping code when dumping sprs in the debug unit nogj 6723d 16h /or1k/tags/rel-0-3-0-rc1/or1ksim/debug/
1576 configure updates phoenix 6836d 15h /or1k/tags/rel-0-3-0-rc1/or1ksim/debug/
1557 Fix most warnings issued by gcc4 nogj 6860d 05h /or1k/tags/rel-0-3-0-rc1/or1ksim/debug/
1550 * prototype() -> prototype(void) where appropriate.
* Use `static' where it can be used.
nogj 6921d 18h /or1k/tags/rel-0-3-0-rc1/or1ksim/debug/
1546 Only tell the user that we don't simulate a stalled cpu when it would actually
get stalled
nogj 6921d 18h /or1k/tags/rel-0-3-0-rc1/or1ksim/debug/
1537 Remove old spr logging code. Use `-d +spr' to get spr access logged to stderr nogj 6922d 07h /or1k/tags/rel-0-3-0-rc1/or1ksim/debug/
1516 Make non-writeable memory writeable by the debug core nogj 6927d 02h /or1k/tags/rel-0-3-0-rc1/or1ksim/debug/
1515 Use the new debug channel code instead of a compile time macro nogj 6927d 02h /or1k/tags/rel-0-3-0-rc1/or1ksim/debug/
1508 Remove m{f,t}spr calls where we can access the spr directly nogj 6927d 02h /or1k/tags/rel-0-3-0-rc1/or1ksim/debug/
1506 * Remove very slow {set,test}sprbit{,s} functions.
* Remove uses of getsprbits in time critical functions.
nogj 6927d 02h /or1k/tags/rel-0-3-0-rc1/or1ksim/debug/
1487 Remove useless *breakpoint argument from the {set,eval}_direct* functions nogj 6965d 06h /or1k/tags/rel-0-3-0-rc1/or1ksim/debug/
1471 Rewrite the interactive mode handling to also work in the recompiler nogj 7017d 21h /or1k/tags/rel-0-3-0-rc1/or1ksim/debug/
1457 Fix typo in the debug unit configureation nogj 7017d 22h /or1k/tags/rel-0-3-0-rc1/or1ksim/debug/
1432 Collect most of the cpu state variables in a structure (cpu_state) nogj 7017d 22h /or1k/tags/rel-0-3-0-rc1/or1ksim/debug/
1376 aclocal && autoconf && automake phoenix 7052d 02h /or1k/tags/rel-0-3-0-rc1/or1ksim/debug/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.