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[/] [or1k/] [tags/] [rel-0-3-0-rc2/] - Rev 998

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Rev Log message Author Age Path
998 added missing fout initialization markom 7981d 12h /or1k/tags/rel-0-3-0-rc2/
997 PRINTF should be used instead of printf; command redirection repaired markom 7981d 13h /or1k/tags/rel-0-3-0-rc2/
996 some minor bugs fixed markom 7982d 11h /or1k/tags/rel-0-3-0-rc2/
994 Store buffer has been tested and it works. BY default it is still disabled until uClinux confirms correct operation on FPGA board. lampret 7982d 19h /or1k/tags/rel-0-3-0-rc2/
993 Fixed IMMU bug. lampret 7982d 19h /or1k/tags/rel-0-3-0-rc2/
992 A bug when cache enabled and bus error comes fixed. simons 7983d 04h /or1k/tags/rel-0-3-0-rc2/
991 Different memory controller. simons 7983d 04h /or1k/tags/rel-0-3-0-rc2/
990 Test is now complete. simons 7983d 04h /or1k/tags/rel-0-3-0-rc2/
989 c++ is making problems so, for now, it is excluded. simons 7984d 12h /or1k/tags/rel-0-3-0-rc2/
988 ORP architecture supported. simons 7985d 04h /or1k/tags/rel-0-3-0-rc2/
987 ORP architecture supported. simons 7985d 11h /or1k/tags/rel-0-3-0-rc2/
986 outputs out of function are not registered anymore markom 7985d 12h /or1k/tags/rel-0-3-0-rc2/
985 DTLB translation doesn't work on or1ksim when IC/DC enabled. lampret 7985d 23h /or1k/tags/rel-0-3-0-rc2/
984 Disable SB until it is tested lampret 7985d 23h /or1k/tags/rel-0-3-0-rc2/
983 First checkin lampret 7986d 01h /or1k/tags/rel-0-3-0-rc2/
982 Moved to sim/bin lampret 7986d 01h /or1k/tags/rel-0-3-0-rc2/
981 First checkin. lampret 7986d 01h /or1k/tags/rel-0-3-0-rc2/
980 Removed sim.tcl that shouldn't be here. lampret 7986d 01h /or1k/tags/rel-0-3-0-rc2/
979 Removed old test case binaries. lampret 7986d 01h /or1k/tags/rel-0-3-0-rc2/
978 Added variable delay for SRAM. lampret 7986d 01h /or1k/tags/rel-0-3-0-rc2/

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