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[/] [or1k/] [tags/] [rel-0-3-0-rc2/] [or1ksim/] - Rev 644

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644 Modified logging of SPR accesses. Logging only explicit instruction accesses. ivang 8195d 13h /or1k/tags/rel-0-3-0-rc2/or1ksim/
643 Quick bug fix. ivang 8195d 13h /or1k/tags/rel-0-3-0-rc2/or1ksim/
642 Modified logging of SPR accesses. Logging only explicit instruction accesses. ivang 8195d 13h /or1k/tags/rel-0-3-0-rc2/or1ksim/
641 Modified logging of SPR accesses. Logging only explicit instruction accesses. ivang 8195d 14h /or1k/tags/rel-0-3-0-rc2/or1ksim/
640 Merge profiler and mprofiler with sim. ivang 8195d 15h /or1k/tags/rel-0-3-0-rc2/or1ksim/
639 MMU cache inhibit bit test added. simons 8198d 05h /or1k/tags/rel-0-3-0-rc2/or1ksim/
638 TLBTR CI bit is now working properly. simons 8198d 06h /or1k/tags/rel-0-3-0-rc2/or1ksim/
633 Bug fix in command line parser. ivang 8199d 11h /or1k/tags/rel-0-3-0-rc2/or1ksim/
632 profiler and mprofiler merged into sim. ivang 8200d 06h /or1k/tags/rel-0-3-0-rc2/or1ksim/
631 Real cache access is simulated now. simons 8201d 05h /or1k/tags/rel-0-3-0-rc2/or1ksim/
630 some bug fixes in store buffer analysis markom 8201d 14h /or1k/tags/rel-0-3-0-rc2/or1ksim/
629 typo fixed markom 8201d 17h /or1k/tags/rel-0-3-0-rc2/or1ksim/
627 or32 restored markom 8201d 18h /or1k/tags/rel-0-3-0-rc2/or1ksim/
626 store buffer added markom 8201d 18h /or1k/tags/rel-0-3-0-rc2/or1ksim/
624 Added logging of writes/read to/from SPR registers. ivang 8202d 10h /or1k/tags/rel-0-3-0-rc2/or1ksim/
623 update based on recent changes; arithmetic instructions does not modify carry yet markom 8202d 12h /or1k/tags/rel-0-3-0-rc2/or1ksim/
622 Cache test works on hardware. simons 8202d 15h /or1k/tags/rel-0-3-0-rc2/or1ksim/
621 Cache test works on hardware. simons 8202d 16h /or1k/tags/rel-0-3-0-rc2/or1ksim/
620 use ARITH_SET_FLAG to turn off set flag by arith. instructions markom 8202d 17h /or1k/tags/rel-0-3-0-rc2/or1ksim/
619 all test pass, after newest changes markom 8202d 17h /or1k/tags/rel-0-3-0-rc2/or1ksim/

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