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[/] [or1k/] [tags/] [rel-0-3-0-rc2/] [or1ksim/] [cpu/] [or1k/] - Rev 1510

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1510 Create a seporate debug channel to dump exceptions to nogj 6979d 06h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/or1k/
1509 Remove 08 prefix from PRIdREG nogj 6979d 06h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/or1k/
1508 Remove m{f,t}spr calls where we can access the spr directly nogj 6979d 06h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/or1k/
1506 * Remove very slow {set,test}sprbit{,s} functions.
* Remove uses of getsprbits in time critical functions.		 nogj 6979d 06h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/or1k/
1486 * Seporate out the code used for handling the memory peripheral to peripheral/memory.c
* Mostly decouple the memory controller from the internals of the memory handling.
* Rewrite memory handling to be more linear and thus much faster.
* Issue a bus error on read/write with invalid granularity.		 nogj 7022d 06h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/or1k/
1481 Remove the useless cross reference stuff: it was a bad idea to begin with nogj 7042d 22h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/or1k/
1473 Add warning that except_handle may not return nogj 7070d 01h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/or1k/
1471 Rewrite the interactive mode handling to also work in the recompiler nogj 7070d 01h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/or1k/
1452 Implement a dynamic recompiler to speed up the execution nogj 7070d 01h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/or1k/
1446 Cosmetic fixes nogj 7070d 01h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/or1k/
1444 Move the definitions needed for the simple execution model out of or32.h and into simpl32_defs.h nogj 7070d 01h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/or1k/
1442 Replace some problematic calles to mfspr/mtspr with direct access to the spr nogj 7070d 01h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/or1k/
1432 Collect most of the cpu state variables in a structure (cpu_state) nogj 7070d 01h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/or1k/
1404 Move the function of ic_clock() to mtspr() and remove it nogj 7070d 02h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/or1k/
1402 Do what dc_clock() did in mtspr() and remove it nogj 7070d 02h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/or1k/
1386 Rework exception handling nogj 7076d 05h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/or1k/
1382 Nir Mor:
Implemented DCCFGR, ICCFGR, DMMUCFGR and IMMUCFGR spr registers.		 nogj 7085d 05h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/or1k/
1376 aclocal && autoconf && automake phoenix 7104d 05h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/or1k/
1354 typing fixes phoenix 7119d 03h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/or1k/
1350 Mark a simulated cpu address as such, by introducing the new oraddr_t type nogj 7120d 00h /or1k/tags/rel-0-3-0-rc2/or1ksim/cpu/or1k/

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