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1745 These are the changes to allow or1ksim to build as a library as well as a standalone simulator. The concept of a "generic" peripheral is added, which will commuicate with an external model via upcalls. jeremybennett 5821d 10h /or1k/tags/rel-0-3-0-rc3/or1ksim/cache/
1743 Changes to bring behavior into line with the current OpenRISC 1000 specification and support GDB 6.8. A couple of small bugs with handling xterms and opening the remote debug channel are also fixed. Header files have been added to sources in Makefile.am files where they are missing, so that "make tags" will include them. Makefile.in files have been regenerated due to these changes. jeremybennett 5822d 10h /or1k/tags/rel-0-3-0-rc3/or1ksim/cache/
1731 Move ic configuration out of the global config struct. Register ic callbacks
instead of haveing static calls to the functions.		 nogj 6780d 20h /or1k/tags/rel-0-3-0-rc3/or1ksim/cache/
1730 Avoid array lookups as far as possible. Precalculate as much as possible.
Increases performance when running with ic.		 nogj 6780d 20h /or1k/tags/rel-0-3-0-rc3/or1ksim/cache/
1649 Mark as many functions as possible static nogj 6782d 09h /or1k/tags/rel-0-3-0-rc3/or1ksim/cache/
1576 configure updates phoenix 6895d 06h /or1k/tags/rel-0-3-0-rc3/or1ksim/cache/
1557 Fix most warnings issued by gcc4 nogj 6918d 20h /or1k/tags/rel-0-3-0-rc3/or1ksim/cache/
1555 * Moved log2_int() from cuc/cuc.c as it is usefull for other things aswell.
* Changed code to use log2_int() instead of log2(), which is also a builtin
library function (fixes compile on gcc4).
* Moved is_power2() from sim-config.c to misc.c.		 nogj 6918d 20h /or1k/tags/rel-0-3-0-rc3/or1ksim/cache/
1506 * Remove very slow {set,test}sprbit{,s} functions.
* Remove uses of getsprbits in time critical functions.		 nogj 6985d 17h /or1k/tags/rel-0-3-0-rc3/or1ksim/cache/
1486 * Seporate out the code used for handling the memory peripheral to peripheral/memory.c
* Mostly decouple the memory controller from the internals of the memory handling.
* Rewrite memory handling to be more linear and thus much faster.
* Issue a bus error on read/write with invalid granularity.		 nogj 7028d 17h /or1k/tags/rel-0-3-0-rc3/or1ksim/cache/
1432 Collect most of the cpu state variables in a structure (cpu_state) nogj 7076d 13h /or1k/tags/rel-0-3-0-rc3/or1ksim/cache/
1406 Fix the declaration of `sec' in reg_ic_sec nogj 7076d 13h /or1k/tags/rel-0-3-0-rc3/or1ksim/cache/
1404 Move the function of ic_clock() to mtspr() and remove it nogj 7076d 13h /or1k/tags/rel-0-3-0-rc3/or1ksim/cache/
1402 Do what dc_clock() did in mtspr() and remove it nogj 7076d 13h /or1k/tags/rel-0-3-0-rc3/or1ksim/cache/
1386 Rework exception handling nogj 7082d 16h /or1k/tags/rel-0-3-0-rc3/or1ksim/cache/
1382 Nir Mor:
Implemented DCCFGR, ICCFGR, DMMUCFGR and IMMUCFGR spr registers.		 nogj 7091d 16h /or1k/tags/rel-0-3-0-rc3/or1ksim/cache/
1376 aclocal && autoconf && automake phoenix 7110d 17h /or1k/tags/rel-0-3-0-rc3/or1ksim/cache/
1358 Modularise config file parseing. Paving the way for further modularisation. nogj 7117d 08h /or1k/tags/rel-0-3-0-rc3/or1ksim/cache/
1350 Mark a simulated cpu address as such, by introducing the new oraddr_t type nogj 7126d 11h /or1k/tags/rel-0-3-0-rc3/or1ksim/cache/
1344 * Avoid doing a store in *every* instruction executed by storeing the instruction function unit in or32_opcodes nogj 7139d 15h /or1k/tags/rel-0-3-0-rc3/or1ksim/cache/

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