OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [rel_1/] - Rev 333

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
333 small bug fixed markom 8279d 15h /or1k/tags/rel_1/
332 removed fixed irq numbering from pic.h; tick timer section added markom 8279d 16h /or1k/tags/rel_1/
331 dependecy is required by history analisis markom 8279d 16h /or1k/tags/rel_1/
330 Cache test lampret 8279d 20h /or1k/tags/rel_1/
329 Now using macros from spr_defs.h lampret 8279d 20h /or1k/tags/rel_1/
328 Moved flag bit into SR. Changed RF enable from constant enable to dynamic enable for read ports. lampret 8279d 22h /or1k/tags/rel_1/
327 simulate_dc_mmu_load() was calling insn cache/mmu routines instead of data cache/mmu. Fixed. lampret 8279d 22h /or1k/tags/rel_1/
326 More realistic default cache type. lampret 8279d 22h /or1k/tags/rel_1/
325 minor ethernet testbench modifications erez 8281d 01h /or1k/tags/rel_1/
324 added initial ethernet RX simulation (very simple for now) erez 8281d 01h /or1k/tags/rel_1/
323 small fix erez 8281d 01h /or1k/tags/rel_1/
322 IC test repaired.C simons 8281d 05h /or1k/tags/rel_1/
321 added missing gdbcomm files markom 8281d 07h /or1k/tags/rel_1/
320 added prototypes for xxx_vapi_id() erez 8281d 13h /or1k/tags/rel_1/
319 Added some tests (nothing to do with mp3 demo) lampret 8281d 19h /or1k/tags/rel_1/
318 Modified monitor tu support exceptions. lampret 8281d 19h /or1k/tags/rel_1/
316 Fixed exceptions. lampret 8281d 20h /or1k/tags/rel_1/
315 Simulator settings. simons 8282d 07h /or1k/tags/rel_1/
314 Exception enabled simons 8282d 07h /or1k/tags/rel_1/
313 added vapi_id to cfg markom 8282d 13h /or1k/tags/rel_1/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.