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[/] [or1k/] [tags/] [rel_1/] - Rev 364

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Rev Log message Author Age Path
364 info spr bug fixed markom 8270d 02h /or1k/tags/rel_1/
363 program can be stepped and continued before running it, supporting low level debugging markom 8270d 03h /or1k/tags/rel_1/
362 some changes based on current modifications to or1k; cleaner register naming; ctrl-c causes stepi; write&read pc work on next instruction markom 8270d 08h /or1k/tags/rel_1/
361 set config command added; config struct has been divided into two structs - config and runtime; -f option allows multiple config scripts markom 8270d 09h /or1k/tags/rel_1/
360 Added OR1200_REGISTERED_INPUTS. lampret 8270d 19h /or1k/tags/rel_1/
359 Added optional sampling of inputs. lampret 8270d 19h /or1k/tags/rel_1/
358 Fixed virtual silicon single-port rams instantiation. lampret 8270d 19h /or1k/tags/rel_1/
357 Fixed dbg_is_o assignment width. lampret 8270d 19h /or1k/tags/rel_1/
356 Break point bug fixed simons 8270d 22h /or1k/tags/rel_1/
355 uart VAPI model improved; changes to MC and eth. markom 8271d 05h /or1k/tags/rel_1/
354 Fixed width of du_except. lampret 8271d 16h /or1k/tags/rel_1/
353 Cashes disabled. simons 8272d 02h /or1k/tags/rel_1/
352 OR1200_REGISTERED_OUTPUTS can now be enabled. lampret 8273d 05h /or1k/tags/rel_1/
351 Fixed some l.trap typos. lampret 8273d 07h /or1k/tags/rel_1/
350 For GDB changed single stepping and disabled trap exception. lampret 8273d 08h /or1k/tags/rel_1/
349 Some bugs regarding cache simulation fixed. simons 8274d 21h /or1k/tags/rel_1/
348 Added instructions on how to build configure. ivang 8276d 05h /or1k/tags/rel_1/
347 Added CRC32 calculation to Ethernet erez 8277d 02h /or1k/tags/rel_1/
346 Improved Ethernet simulation erez 8277d 03h /or1k/tags/rel_1/
345 Added check for net/ethernet.h (needed by ethernet simulator) erez 8277d 03h /or1k/tags/rel_1/

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