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[/] [or1k/] [tags/] [rel_1/] - Rev 642

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Rev	Log message	Author	Age	Path
642	Modified logging of SPR accesses. Logging only explicit instruction accesses.	ivang	8227d 21h	/or1k/tags/rel_1/
641	Modified logging of SPR accesses. Logging only explicit instruction accesses.	ivang	8227d 21h	/or1k/tags/rel_1/
640	Merge profiler and mprofiler with sim.	ivang	8227d 23h	/or1k/tags/rel_1/
639	MMU cache inhibit bit test added.	simons	8230d 13h	/or1k/tags/rel_1/
638	TLBTR CI bit is now working properly.	simons	8230d 14h	/or1k/tags/rel_1/
637	Updated file names.	lampret	8230d 15h	/or1k/tags/rel_1/
636	Fixed combinational loops.	lampret	8230d 15h	/or1k/tags/rel_1/
635	Fixed Makefile bug.	ivang	8230d 17h	/or1k/tags/rel_1/
634	configure.in : fixed to build start/Makefile start.S : l.jalr r9 -> l.jr r9 Added missing files.	ivang	8231d 18h	/or1k/tags/rel_1/
633	Bug fix in command line parser.	ivang	8231d 19h	/or1k/tags/rel_1/
632	profiler and mprofiler merged into sim.	ivang	8232d 14h	/or1k/tags/rel_1/
631	Real cache access is simulated now.	simons	8233d 12h	/or1k/tags/rel_1/
630	some bug fixes in store buffer analysis	markom	8233d 21h	/or1k/tags/rel_1/
629	typo fixed	markom	8234d 01h	/or1k/tags/rel_1/
627	or32 restored	markom	8234d 02h	/or1k/tags/rel_1/
626	store buffer added	markom	8234d 02h	/or1k/tags/rel_1/
625	Bus error bug fixed. Cache routines added.	simons	8234d 18h	/or1k/tags/rel_1/
624	Added logging of writes/read to/from SPR registers.	ivang	8234d 18h	/or1k/tags/rel_1/
623	update based on recent changes; arithmetic instructions does not modify carry yet	markom	8234d 20h	/or1k/tags/rel_1/
622	Cache test works on hardware.	simons	8234d 23h	/or1k/tags/rel_1/

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[/] [or1k/] [tags/] [rel_1/] - Rev 642

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