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Rev	Log message	Author	Age	Path
80	First import.	lampret	8519d 01h	/or1k/tags/rel_10/
79	Data and instruction cache simulation added.	lampret	8520d 22h	/or1k/tags/rel_10/
78	(i/d)tlb_status	lampret	8644d 12h	/or1k/tags/rel_10/
77	Regular update.	lampret	8644d 12h	/or1k/tags/rel_10/
76	regular update	lampret	8644d 12h	/or1k/tags/rel_10/
75	simgetstr added. eval_mem32 replaced with evalsim_mem32.	lampret	8644d 12h	/or1k/tags/rel_10/
74	Same as DMMU.	lampret	8651d 12h	/or1k/tags/rel_10/
73	Fixed all bugs. Now more or less works. IMMU still has some problems (exception start).	lampret	8651d 12h	/or1k/tags/rel_10/
72	Added 'how to build GNU tools'	lampret	8656d 13h	/or1k/tags/rel_10/
71	Clean two typos.	lampret	8661d 14h	/or1k/tags/rel_10/
70	Basic setjmp/longjmp are ready.	lampret	8661d 14h	/or1k/tags/rel_10/
69	Sim debug.	lampret	8663d 12h	/or1k/tags/rel_10/
68	Added hook for l.sys 204. Changed SPR of flag (no more CCR)	lampret	8663d 12h	/or1k/tags/rel_10/
67	Added simulator "application load".	lampret	8663d 12h	/or1k/tags/rel_10/
66	Added another set of eval_ functions that should be used directly by simulator. evalsim_ and setsim_ don't go through MMU transaltion mechanism.	lampret	8663d 12h	/or1k/tags/rel_10/
65	Added DMMU stats.	lampret	8663d 12h	/or1k/tags/rel_10/
64	SPR bit definition moved to spr_defs.h.	lampret	8663d 12h	/or1k/tags/rel_10/
63	Fixed a bug in getsprbits/setsprbits functions (now mask can have arbitry alignment of bits).	lampret	8663d 12h	/or1k/tags/rel_10/
62	OR1K DMMU model.	lampret	8663d 12h	/or1k/tags/rel_10/
61	2000-09-26 Joel Sherrill <joel@OARcorp.com> * libc/sys/rtems/include/pthread.h: Added file missed by earlier commit of RTEMS modifications.	joel	8678d 07h	/or1k/tags/rel_10/

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[/] [or1k/] [tags/] [rel_10/] - Rev 80

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