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[/] [or1k/] [tags/] [rel_10/] - Rev 999

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Rev Log message Author Age Path
999 Now every ramdisk image should have init program. simons 7996d 11h /or1k/tags/rel_10/
998 added missing fout initialization markom 7996d 12h /or1k/tags/rel_10/
997 PRINTF should be used instead of printf; command redirection repaired markom 7996d 13h /or1k/tags/rel_10/
996 some minor bugs fixed markom 7997d 12h /or1k/tags/rel_10/
994 Store buffer has been tested and it works. BY default it is still disabled until uClinux confirms correct operation on FPGA board. lampret 7997d 20h /or1k/tags/rel_10/
993 Fixed IMMU bug. lampret 7997d 20h /or1k/tags/rel_10/
992 A bug when cache enabled and bus error comes fixed. simons 7998d 05h /or1k/tags/rel_10/
991 Different memory controller. simons 7998d 05h /or1k/tags/rel_10/
990 Test is now complete. simons 7998d 05h /or1k/tags/rel_10/
989 c++ is making problems so, for now, it is excluded. simons 7999d 13h /or1k/tags/rel_10/
988 ORP architecture supported. simons 8000d 04h /or1k/tags/rel_10/
987 ORP architecture supported. simons 8000d 12h /or1k/tags/rel_10/
986 outputs out of function are not registered anymore markom 8000d 12h /or1k/tags/rel_10/
985 DTLB translation doesn't work on or1ksim when IC/DC enabled. lampret 8001d 00h /or1k/tags/rel_10/
984 Disable SB until it is tested lampret 8001d 00h /or1k/tags/rel_10/
983 First checkin lampret 8001d 02h /or1k/tags/rel_10/
982 Moved to sim/bin lampret 8001d 02h /or1k/tags/rel_10/
981 First checkin. lampret 8001d 02h /or1k/tags/rel_10/
980 Removed sim.tcl that shouldn't be here. lampret 8001d 02h /or1k/tags/rel_10/
979 Removed old test case binaries. lampret 8001d 02h /or1k/tags/rel_10/

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