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69 Sim debug. lampret 8674d 18h /or1k/tags/rel_11/
68 Added hook for l.sys 204. Changed SPR of flag (no more CCR) lampret 8674d 18h /or1k/tags/rel_11/
67 Added simulator "application load". lampret 8674d 18h /or1k/tags/rel_11/
66 Added another set of eval_ functions that should be used directly by simulator.
evalsim_ and setsim_ don't go through MMU transaltion mechanism.		 lampret 8674d 18h /or1k/tags/rel_11/
65 Added DMMU stats. lampret 8674d 18h /or1k/tags/rel_11/
64 SPR bit definition moved to spr_defs.h. lampret 8674d 18h /or1k/tags/rel_11/
63 Fixed a bug in getsprbits/setsprbits functions (now mask can have arbitry
alignment of bits).		 lampret 8674d 18h /or1k/tags/rel_11/
62 OR1K DMMU model. lampret 8674d 18h /or1k/tags/rel_11/
61 2000-09-26 Joel Sherrill <joel@OARcorp.com>

* libc/sys/rtems/include/pthread.h: Added file missed by earlier
commit of RTEMS modifications.		 joel 8689d 12h /or1k/tags/rel_11/
60 Memory model changed. lampret 8709d 21h /or1k/tags/rel_11/
59 2000-09-05 Joel Sherrill <joel@OARcorp.com>

* Merged newlib-1.8.2-rtems-20000905.diff which includes
or16 and or32 configuration support.		 joel 8710d 09h /or1k/tags/rel_11/
57 This commit was generated by cvs2svn to compensate for changes in r56, which
included commits to RCS files with non-trunk default branches.		 joel 8716d 06h /or1k/tags/rel_11/
55 Added 'dv' command for dumping memory as verilog model. lampret 8725d 18h /or1k/tags/rel_11/
54 Regular maintenance. lampret 8725d 18h /or1k/tags/rel_11/
53 Added setjmp/longjmp. lampret 8730d 18h /or1k/tags/rel_11/
52 Comment character changed. lampret 8786d 14h /or1k/tags/rel_11/
51 Exception detection changed a bit. lampret 8786d 14h /or1k/tags/rel_11/
50 Added CURINSN macro. lampret 8786d 14h /or1k/tags/rel_11/
49 Changed simulation mode to non-virtual (real). lampret 8786d 14h /or1k/tags/rel_11/
48 Added CCR. lampret 8786d 14h /or1k/tags/rel_11/

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