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[/] [or1k/] [tags/] [rel_12/] - Rev 895

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Rev Log message Author Age Path
895 Added simple trace buffer [only for Xilinx Virtex target]. Fixed instruction fetch abort when new exception is recognized. lampret 8035d 09h /or1k/tags/rel_12/
894 Typing mistake fixed. simons 8037d 07h /or1k/tags/rel_12/
893 Ethernet tested on xess board. simons 8037d 07h /or1k/tags/rel_12/
891 eth_ledc not positioned correctly. Fixed. mohor 8037d 08h /or1k/tags/rel_12/
890 Ethernet RXD pins were not positioned correctly. mohor 8037d 08h /or1k/tags/rel_12/
889 Modified Ethernet model. ivang 8037d 13h /or1k/tags/rel_12/
888 LCD 320x240 configuration added. simons 8038d 06h /or1k/tags/rel_12/
887 Some additional instructions fixes. simons 8038d 16h /or1k/tags/rel_12/
886 MMU registers reserved fields protected from writing. simons 8039d 15h /or1k/tags/rel_12/
885 Some incorrect instructions fixed. simons 8039d 18h /or1k/tags/rel_12/
884 code cleaning - a lot of global variables moved to runtime struct markom 8039d 21h /or1k/tags/rel_12/
883 cuc updated, cuc prompt parsing; CSM analysis markom 8040d 16h /or1k/tags/rel_12/
882 Routine for adjusting read and write delay for devices added. simons 8042d 19h /or1k/tags/rel_12/
881 Normally uart rx and tx files should be in the current folder. mohor 8043d 12h /or1k/tags/rel_12/
880 Library should not be erased during clean. mohor 8043d 13h /or1k/tags/rel_12/
879 Initial version of OpenRISC Custom Unit Compiler added markom 8045d 15h /or1k/tags/rel_12/
878 first release of atabug rherveille 8047d 09h /or1k/tags/rel_12/
877 ata beta release rherveille 8047d 09h /or1k/tags/rel_12/
876 Beta release of ATA simulation rherveille 8047d 09h /or1k/tags/rel_12/
875 libgcc is moved here to avoid the mess with the folders. simons 8047d 21h /or1k/tags/rel_12/

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