OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [rel_14/] - Rev 1150

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
1150 remove unneded include phoenix 7717d 06h /or1k/tags/rel_14/
1149 *** empty log message *** phoenix 7717d 17h /or1k/tags/rel_14/
1148 *** empty log message *** phoenix 7717d 17h /or1k/tags/rel_14/
1147 remove unneeded include phoenix 7717d 17h /or1k/tags/rel_14/
1146 cygwin fix phoenix 7717d 18h /or1k/tags/rel_14/
1145 1) Fix trivial bug w/ transmitter empty interrupts that I introduced in the
last check-in.
2) Improve printed output from debugging-only uart_status() routine.
sfurman 7717d 18h /or1k/tags/rel_14/
1144 Speed up gdb when running with serial targets:

When generating backtraces, the prologue of each function is scanned
at least three times by architecture-independent code, e.g. to
determine offsets of saved registers, identify frameless functions,
etc. This new code adds straightforward caching of the information
gleaned by or1k_scan_prologue() on a per-frame basis rather than
storing it in global static variables. (This benefits both JTAG and
serial gdb targets, though the JTAG target runs fast enough that it is
not particularly needed.)

When the register set is dumped by the serial target, e.g. at any
breakpoint or interrupt, the 32 vector/FP registers were included in
the dump (each 8 bytes long), though they aren't implemented. The new
code tells gdb that unimplemented registers have zero length in the
dump.
sfurman 7720d 00h /or1k/tags/rel_14/
1143 Make UART transmitter-empty interrupts match both 16450 and 16550 behavior. sfurman 7720d 14h /or1k/tags/rel_14/
1142 Speed up gdb when running with serial targets:

When generating backtraces, the prologue of each function is scanned
at least three times by architecture-independent code, e.g. to
determine offsets of saved registers, identify frameless functions,
etc. This new code adds straightforward caching of the information
gleaned by or1k_scan_prologue() on a per-frame basis rather than
storing it in global static variables. (This benefits both JTAG and
serial gdb targets, though the JTAG target runs fast enough that it is
not particularly needed.)

When the register set is dumped by the serial target, e.g. at any
breakpoint or interrupt, the 32 vector/FP registers were included in
the dump (each 8 bytes long), though they aren't implemented. The new
code tells gdb that unimplemented registers have zero length in the
dump.
sfurman 7720d 14h /or1k/tags/rel_14/
1141 WB = 1/2 RISC clock test code enabled. lampret 7721d 23h /or1k/tags/rel_14/
1140 Fixed OR1200_CLKDIV_x_SUPPORTED defines. Fixed order of ifdefs. lampret 7722d 00h /or1k/tags/rel_14/
1139 Fixed OR1200_CLKDIV_x_SUPPORTED defines. Better description. lampret 7722d 00h /or1k/tags/rel_14/
1138 Added some information how to run simulations. lampret 7722d 19h /or1k/tags/rel_14/
1137 Added RFRAM generic and Altera lpm library. lampret 7722d 19h /or1k/tags/rel_14/
1136 Add altera lpm library. lampret 7722d 19h /or1k/tags/rel_14/
1135 Added get_gpr support for OR1200_RFRAM_GENERIC lampret 7722d 19h /or1k/tags/rel_14/
1134 Changed location of debug test code to 0. lampret 7722d 19h /or1k/tags/rel_14/
1133 Adding OR1200_CLMODE_1TO2 test code. lampret 7722d 19h /or1k/tags/rel_14/
1132 RFRAM defines comments updated. Altera LPM option added. lampret 7722d 19h /or1k/tags/rel_14/
1131 Added another pipe stage to match gmult. One day second pipe in amult and gmult might be removed to get better performance. lampret 7722d 19h /or1k/tags/rel_14/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.