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[/] [or1k/] [tags/] [rel_16/] - Rev 356

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Rev	Log message	Author	Age	Path
356	Break point bug fixed	simons	8273d 01h	/or1k/tags/rel_16/
355	uart VAPI model improved; changes to MC and eth.	markom	8273d 08h	/or1k/tags/rel_16/
354	Fixed width of du_except.	lampret	8273d 18h	/or1k/tags/rel_16/
353	Cashes disabled.	simons	8274d 05h	/or1k/tags/rel_16/
352	OR1200_REGISTERED_OUTPUTS can now be enabled.	lampret	8275d 08h	/or1k/tags/rel_16/
351	Fixed some l.trap typos.	lampret	8275d 09h	/or1k/tags/rel_16/
350	For GDB changed single stepping and disabled trap exception.	lampret	8275d 11h	/or1k/tags/rel_16/
349	Some bugs regarding cache simulation fixed.	simons	8276d 23h	/or1k/tags/rel_16/
348	Added instructions on how to build configure.	ivang	8278d 07h	/or1k/tags/rel_16/
347	Added CRC32 calculation to Ethernet	erez	8279d 04h	/or1k/tags/rel_16/
346	Improved Ethernet simulation	erez	8279d 06h	/or1k/tags/rel_16/
345	Added check for net/ethernet.h (needed by ethernet simulator)	erez	8279d 06h	/or1k/tags/rel_16/
344	added acv test for uart; sim debug now has verbose levels; lot of bugs fixed in uart model	markom	8279d 08h	/or1k/tags/rel_16/
343	Small touches to test programs	erez	8279d 10h	/or1k/tags/rel_16/
342	added exception vectors to support and modified section names	markom	8280d 07h	/or1k/tags/rel_16/
341	added VAPI for uart; uart 16550 support, some bugs fixed	markom	8280d 09h	/or1k/tags/rel_16/
340	Added hpint vector	lampret	8280d 09h	/or1k/tags/rel_16/
339	Added setpc test	lampret	8280d 09h	/or1k/tags/rel_16/
338	Added 'setpc'. Renamed some signals (except_flushpipe into flushpipe etc)	lampret	8280d 09h	/or1k/tags/rel_16/
337	Fixed tick timer interrupt reporting by using TTCR[IP] bit.	lampret	8280d 09h	/or1k/tags/rel_16/

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[/] [or1k/] [tags/] [rel_16/] - Rev 356

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