URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [rel_16/] - Rev 640

Rev	Log message	Author	Age	Path
640	Merge profiler and mprofiler with sim.	ivang	8198d 05h	/or1k/tags/rel_16/
639	MMU cache inhibit bit test added.	simons	8200d 19h	/or1k/tags/rel_16/
638	TLBTR CI bit is now working properly.	simons	8200d 20h	/or1k/tags/rel_16/
637	Updated file names.	lampret	8200d 21h	/or1k/tags/rel_16/
636	Fixed combinational loops.	lampret	8200d 21h	/or1k/tags/rel_16/
635	Fixed Makefile bug.	ivang	8200d 23h	/or1k/tags/rel_16/
634	configure.in : fixed to build start/Makefile start.S : l.jalr r9 -> l.jr r9 Added missing files.	ivang	8202d 00h	/or1k/tags/rel_16/
633	Bug fix in command line parser.	ivang	8202d 01h	/or1k/tags/rel_16/
632	profiler and mprofiler merged into sim.	ivang	8202d 20h	/or1k/tags/rel_16/
631	Real cache access is simulated now.	simons	8203d 18h	/or1k/tags/rel_16/
630	some bug fixes in store buffer analysis	markom	8204d 03h	/or1k/tags/rel_16/
629	typo fixed	markom	8204d 07h	/or1k/tags/rel_16/
627	or32 restored	markom	8204d 07h	/or1k/tags/rel_16/
626	store buffer added	markom	8204d 07h	/or1k/tags/rel_16/
625	Bus error bug fixed. Cache routines added.	simons	8205d 00h	/or1k/tags/rel_16/
624	Added logging of writes/read to/from SPR registers.	ivang	8205d 00h	/or1k/tags/rel_16/
623	update based on recent changes; arithmetic instructions does not modify carry yet	markom	8205d 02h	/or1k/tags/rel_16/
622	Cache test works on hardware.	simons	8205d 05h	/or1k/tags/rel_16/
621	Cache test works on hardware.	simons	8205d 06h	/or1k/tags/rel_16/
620	use ARITH_SET_FLAG to turn off set flag by arith. instructions	markom	8205d 06h	/or1k/tags/rel_16/