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[/] [or1k/] [tags/] [rel_17/] - Rev 1037

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Rev Log message Author Age Path
1037 First import of the new synopsys DC scripts. lampret 7974d 09h /or1k/tags/rel_17/
1036 Removed old synthesis scripts. lampret 7974d 09h /or1k/tags/rel_17/
1035 Added optional l.div/l.divu insns. By default they are disabled. lampret 7974d 22h /or1k/tags/rel_17/
1034 Fixed encoding for l.div/l.divu. lampret 7975d 01h /or1k/tags/rel_17/
1033 If SR[CY] implemented with OR1200_IMPL_ADDC enabled, l.add/l.addi also set SR[CY]. lampret 7975d 09h /or1k/tags/rel_17/
1032 Added optional SR[CY]. Added define to enable additional (compare) flag modifiers. Defines are OR1200_IMPL_ADDC and OR1200_ADDITIONAL_FLAG_MODIFIERS. lampret 7975d 22h /or1k/tags/rel_17/
1031 Setting phy to 10Mbps full duplex. simons 7976d 13h /or1k/tags/rel_17/
1030 Ethernet configured for 10Mbps. simons 7977d 10h /or1k/tags/rel_17/
1029 Typing error fixed. simons 7977d 10h /or1k/tags/rel_17/
1028 Import. ivang 7977d 11h /or1k/tags/rel_17/
1027 PRINTF/printf mess fixed. simons 7977d 19h /or1k/tags/rel_17/
1026 rtems-20020807 import ivang 7978d 05h /or1k/tags/rel_17/
1025 PRINTF/printf mess fixed. simons 7978d 08h /or1k/tags/rel_17/
1024 Mess with printf/PRINTF fixed. Ethernet test changed to support latest changes. simons 7978d 16h /or1k/tags/rel_17/
1023 Now most of the configuration registers are updatded automatically based on defines in or1200_defines.v. lampret 7979d 03h /or1k/tags/rel_17/
1022 As per Taylor Su suggestion all case blocks are full case by default and optionally (OR1200_CASE_DEFAULT) can be disabled to increase clock frequncy. lampret 7979d 05h /or1k/tags/rel_17/
1021 *** empty log message *** rherveille 7983d 08h /or1k/tags/rel_17/
1020 Fixed several bugs
Working version, tested on Bender hardware		 rherveille 7983d 08h /or1k/tags/rel_17/
1019 fixed some bugs detected by Bender hardware rherveille 7983d 08h /or1k/tags/rel_17/
1018 TX_BD_NUM register now contains a real number of transmit BDs (before this was n*2) simons 7983d 15h /or1k/tags/rel_17/

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