URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [rel_17/] - Rev 1110

Rev	Log message	Author	Age	Path
1110	Re-generated.	lampret	7847d 02h	/or1k/tags/rel_17/
1109	Temp files should rather not be in the cvs repository.	lampret	7847d 02h	/or1k/tags/rel_17/
1108	Errors fixed.	lampret	7847d 02h	/or1k/tags/rel_17/
1107	Updatded and improved formatting.	lampret	7847d 02h	/or1k/tags/rel_17/
1106	Cache invalidate bug fixed again (it was ok before).	simons	7881d 06h	/or1k/tags/rel_17/
1105	Added WB b3 signals	lampret	7882d 13h	/or1k/tags/rel_17/
1104	Added optional support for WB B3 specification (xwb_cti_o, xwb_bte_o). Made xwb_cab_o optional.	lampret	7882d 13h	/or1k/tags/rel_17/
1103	sync problem in cuc not yet fixed	markom	7887d 07h	/or1k/tags/rel_17/
1102	few cuc bug fixes	markom	7887d 07h	/or1k/tags/rel_17/
1101	cuc now compiles	markom	7887d 10h	/or1k/tags/rel_17/
1100	cvs problem fixed	markom	7887d 10h	/or1k/tags/rel_17/
1099	cvs bug fixed	markom	7887d 10h	/or1k/tags/rel_17/
1098	small bug in cuc fixed	markom	7887d 11h	/or1k/tags/rel_17/
1097	Cache invalidate bug fixed.	simons	7888d 01h	/or1k/tags/rel_17/
1096	An example of SW and RTL regression log because many people asked for.	lampret	7893d 22h	/or1k/tags/rel_17/
1095	eval_reg replaced with the new evalsim_reg32	lampret	7894d 18h	/or1k/tags/rel_17/
1094	sys/time.h might not be available for or1k target	lampret	7894d 20h	/or1k/tags/rel_17/
1093	New UART rx/tx fiel settings (due to or1ksim upgrade)	lampret	7894d 20h	/or1k/tags/rel_17/
1092	Changed from or32-rtems toolchain to or32-uclinux.	lampret	7894d 20h	/or1k/tags/rel_17/
1091	Added mmu test.	lampret	7894d 20h	/or1k/tags/rel_17/