OpenCores
URL https://opencores.org/ocsvn/or1k/or1k/trunk

Subversion Repositories or1k

[/] [or1k/] [tags/] [rel_2/] - Rev 167

Rev

Go to most recent revision

Filtering Options

Clear current filter

Rev Log message Author Age Path
167 - SPR values corrected
- testbenches now work
- lot of optimizations, use --disable-debugmod for optimal performance
- some tick timer bugs fixed		 markom 8403d 02h /or1k/tags/rel_2/
166 Fixed RAM's oen bug. Cache bypass under development. lampret 8420d 13h /or1k/tags/rel_2/
165 Added variable ack of WB transfers (see NODELAY_WBx). lampret 8420d 13h /or1k/tags/rel_2/
164 *** empty log message *** lampret 8422d 15h /or1k/tags/rel_2/
163 Forgot files.f file. lampret 8422d 15h /or1k/tags/rel_2/
162 Benches (under development). lampret 8422d 15h /or1k/tags/rel_2/
161 Development version of RTL. Libraries are missing. lampret 8422d 15h /or1k/tags/rel_2/
160 simulation script lampret 8422d 16h /or1k/tags/rel_2/
159 synthesis scripts lampret 8422d 16h /or1k/tags/rel_2/
158 Initial RTEMS import chris 8432d 06h /or1k/tags/rel_2/
157 Update simons 8439d 09h /or1k/tags/rel_2/
156 File moved to opcode. simons 8439d 09h /or1k/tags/rel_2/
155 Update simons 8439d 09h /or1k/tags/rel_2/
154 Updated for new runtime environment chris 8445d 09h /or1k/tags/rel_2/
153 Writes to SPR_PC are now enabled chris 8445d 09h /or1k/tags/rel_2/
152 Breakpoint exceptions from single step are not printed now. chris 8445d 09h /or1k/tags/rel_2/
151 Typo in the previous commit. Sorry. chris 8445d 09h /or1k/tags/rel_2/
150 Fixed some single stepping issues chris 8445d 09h /or1k/tags/rel_2/
149 Fixed bug where disassemble command caused a segmentation fault chris 8446d 12h /or1k/tags/rel_2/
148 Replace single stepping patch that got overwritten chris 8446d 12h /or1k/tags/rel_2/

1 2 Next >

Show All

powered by: WebSVN 2.1.0

© copyright 1999-2024 OpenCores.org, equivalent to Oliscience, all rights reserved. OpenCores®, registered trademark.